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SD C ar d As so cia tio n SD Memory Card Specifications PHYSICAL LAYER SPECIFICATION Part 1 April 15 2001 SD Group Matsushita Electric Industrial Co., Ltd. (MEI) SanDisk Corporation Toshiba Corporation Version 1.01 CONFIDENTIAL Simplified Version of : SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 2 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 Revision History Date Version Changes compared to previous issue March 22th, 2000 1.0 Base version April 15th, 2001 1.01 Detailed description of the revision history is given in the full version of Spec Ver 1.01. Copyright (C)2000 (C)2001 by SD Group (MEI, SanDisk, Toshiba) - Confidentiality: This document is a simplified version of the original. This version is not required to be treated as confidential and Reproduction in whole or in part is prohibited without prior written permission of SD Group. - Exemption: - Publisher and Copyright Holder: None will be liable for any damage from use of this document. Conditions for publication: SD Group (MEI, SanDisk, Toshiba) . Non Disclosure Agreement with neither the SD Group nor the SDA is required. SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 3 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 1 General description - 4 2 System features - 6 3 SD Memory Card System Concept - 7 3.1 Bus Topology - 7 3.1.1 SD bus - 8 3.1.2 SPI bus - 19 3.2 Bus Protocol - 10 3.2.1 SD bus - 10 3.2.2 SPI Bus - 13 3.3 SD Memory Card - Pins and Registers - 15 3.4 Compatibility to MultiMediaCard - 17 4 SD Memory Card Functional Description - 20 5 Card Registers - 20 6 SD Memory Card Hardware Interface - 20 7 SPI Mode - 20 8 SD Memory Card mechanical specification - 21 8.1 Card package - 21 8.1.1 External signal contacts (ESC) - 21 8.1.2 Design and format - 22 8.1.3 Reliability and durability - 22 8.1.4 Electrical Static Discharge (ESD) Requirements - 23 8.1.5 Quality assurance - 23 8.2 Mechanical form factor - 24 8.3 System: card and connector - 27 8.3.1 Card hot insertion - 27 8.3.2 Inverse insertion - 27 8.3.3 Card Orientation - 28 8.4 Thin (1.4mm) SD Memory Card (Preliminary) - 28 9 Appendix - 31 10 Abbreviations and terms - 32 SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 4 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 General description 1 General description SD Memory Card (Secure Digital Memory Card) is a memory card that is specifically designed to meet the security, capacity, performance and environment requirements inherent in newly emerging audio and video consumer electronic devices. The SD Memory Card will include a copyright protec- tion mechanism that complies with the security of the SDMI standard and will be faster and capable for higher Memory capacity. The SD Memory Card security system uses mutual authentication and a "new cipher algorithm" to protect from illegal usage of the card content. A none secured access to the user‘s own content is also available. The physical form factor, pin assignment and data transfer protocol are forward compatible with the MultiMediaCard with some additions. The SD Memory Card communication is based on an advanced 9-pin interface (Clock, Command, 4xData and 3xPower lines) designed to operate in at maximum operating frequency of 25MHz of and low voltage range. The communication protocol is defined as a part of this specification. The SD Memory Card host interface supports regular MultiMediaCard operation as well. In other words, MultiMediaCard forward compatibility was kept. Actually the main difference between SD Memory Card and MultiMediaCard is the initialization process. The SD Memory Card Specifications were divided to several documents. The SD Memory Card documentation structure is given in Figure 1. Figure 1: SD Memory Card Documentation Structure • SD Memory Card Audio Specification: This specification along with other application specifications describe the specification of certain application (in this case - Audio Application) and the requirements to implement it. • SD Memory Card File System Specification: Describes the specification of the file format structure of the data saved in the SD Memory Card (in protected and un-protected areas). • SD Memory Card Security Specification: Describes the copyright protection mechanism and the application specific commands that support it. • SD Memory Card Physical Layer Specification (this document): Describes the physical interface and the command protocol used by the SD Memory Card. The purpose of the SD Memory Card Physical Layer specification is the definition of the SD Memory Card, its environment and handling. The document is split up into several portions. Chapter 3 gives a general overview of the system Audio Specification other Application Documents File System Specification SD Memory Card Physical Layer Spec. (This Document) SD Memory Security Card Spec. SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 5 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 General description concepts. The common SD Memory Card characteristics are described in Chapter 4. As this description defines an overall set of card properties, we recommend to use the product documenta- tion in parallel. The card registers are described in Chapter 5. Chapter 6 defines the electrical parameters of the SD Memory Card’s hardware interface. Chapter 8 describes the physical and mechanical properties of the SD Memory Cards and the mini- mal recommendations to the card slots or cartridges. As used in this document, “shall” or “will” denotes a mandatory provision of the standard. “Should” denotes a provision that is recommended but not mandatory. “May” denotes a feature whose pres- ence does not preclude compliance, that may or may not be present at the option of the implemen- tor. SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 6 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 System features 2 System features • Targeted for portable and stationary applications • Voltage range: SD Memory Card - Basic communication (CMD0, CMD15, CMD55, ACMD41): 2.0 - 3.6V Other commands and memory access: 2.7 - 3.6V SDLV Memory Card (low voltage) - Operating voltage range: 1.6 - 3.6V • Designed for read-only and read/write cards. • Variable clock rate 0 - 25 MHZ • Up to 10MByte/sec Read/Write rate (using 4 parallel data lines). • Maximum data rate with up to 10 cards • Correction of memory field errors • Card removal during read operation will never harm the content • Forward compatibility to MultiMediaCard • Copyrights Protection Mechanism - Complies with highest security of SDMI stan- dard. • Password Protection of cards (option) • Write Protect feature using mechanical switch • Built-in write protection features (permanent and temporary) • Card Detection (Insertion/Removal) • Application specific commands • Comfortable erase mechanism • Protocol attributes of the communication channel: • SD Memory Card thickness is defined as either 2.1mm (normal) and 1.4mm (Thin SD Memory Card) . SD Memory Card Communication Channel Six-wire communication channel (clock, command, 4 data lines) Error-protected data transfer Single or Multiple block oriented data transfer SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 7 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 SD Memory Card System Concept 3 SD Memory Card System Concept The SD Memory Card provides application designers with a low cost mass storage device, imple- mented as a removable card, that supports high security level for copyright protection and a com- pact, easy-to-implement interface. SD Memory Cards can be grouped into several card classes which differ in the functions they pro- vide (given by the subset of SD Memory Card system commands): • Read/Write (RW) cards (Flash, One Time Programmable - OTP, Multiple Time Programmable - MTP). These cards are typically sold as blank (empty) media and are used for mass data stor- age, end user recording of video, audio or digital images. • Read Only Memory (ROM) cards. These cards are manufactured with a fixed data content. They are typically used as a distribution media for software, audio, video etc. In terms of operating supply voltage, two types of SD Memory Cards are defined: • SD Memory Cards which supports initialization/identification process with a range of 2.0-3.6v and operating voltage within this range as defined in the CSD register. • SDLV Memory Cards - Low Voltage SD Memory Cards, that can be operate in voltage range of 1.6-3.6V. The SDLV Memory Cards will be labeled differently then SD Memory Cards. SD Memory Card system includes the SD Memory Card (or several cards) the bus and their Host / Application. The Host and Application specification is beyond the scope of this document. The fol- lowing sections provides an overview of the card, bus topology and communication protocols of the SD Memory Card system. The copyright protection (security) system description is given in “SD Memory Card Security Specification” document. 3.1 Bus Topology The SD Memory Card system defines two alternative communication protocols: SD and SPI. Appli- cations can choose either one of modes. Mode selection is transparent to the host. The card auto- matically detects the mode of the reset command and will expect all further communication to be in the same communication mode. Therefore, applications which uses only one communication mode do not have to be aware of the other. SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 8 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 SD Memory Card System Concept 3.1.1 SD bus Figure 2: SD Memory Card system bus Topology The SD bus includes the following signals: CLK: Host to card clock signal CMD: Bidirectional Command/Response signal DAT0 - DAT3: 4 Bidirectional data signals. VDD, VSS1, VSS2: Power and ground signals. The SD Memory Card bus has a single master (application), multiple slaves (cards), synchronous star topology (refer to Figure 2). Clock, power and ground signals are common to all cards. Com- mand (CMD) and data (DAT0 - DAT3) signals are dedicated to each card providing continues point to point connection to all the cards. During initialization process commands are sent to each card individually, allowing the application to detect the cards and assign logical addresses to the physical slots. Data is always sent (received) to (from) each card individually. However, in order to simply the handling of the card stack, after the initialization process, all commands may be sent concurrently to all cards. Addressing information is provided in the command packet. SD bus allows dynamic configuration of the number of data lines. After power up, by default, the SD Memory Card will use only DAT0 for data transfer. After initialization the host can change the bus width (number of active data lines). This feature allows easy trade off between HW cost and system performance. Note that while DAT1-DAT3 are not in use, the related Host’s DAT lines should be in tri-state (input mode). SD Memory Card (A) CLK Vdd Vss D0-D3, CMD SD Memory Card (B) CLK Vdd Vss D0-D3, CMD MultiMediaCard (C) CLK Vdd Vss D0, CS, CMD CLK Vdd Vss D0-3(A), CMD(A) D0-3(B), CMD(B) D0-3(C) CMD(C) HOST D1&D2 Not Connected SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 9 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 SD Memory Card System Concept 3.1.2 SPI bus The SPI compatible communication mode of the SD Memory Card is designed to communicate with a SPI channel, commonly found in various microcontrollers in the market. The interface is selected during the first reset command after power up and cannot be changed as long as the part is pow- ered on. The SPI standard defines the physical link only, and not the complete data transfer protocol. The SD Memory Card SPI implementation uses the same command set of the SD mode. From the applica- tion point of view, the advantage of the SPI mode is the capability of using an off-the-shelf host, hence reducing the design-in effort to minimum. The disadvantage is the loss of performance, rela- tively to the SD mode which enables the wide bus option. The SD Memory Card SPI interface is compatible with SPI hosts available on the market. As any other SPI device the SD Memory Card SPI channel consists of the following four signals: CS: Host to card Chip Select signal. CLK: Host to card clock signal DataIn: Host to card data signal. DataOut: Card to host data signal. Another SPI common characteristic are byte transfers, which is implemented in the card as well. All data tokens are multiples of bytes (8 bit) and always byte aligned to the CS signal. Figure 3: SD Memory Card system (SPI mode) bus topology The card identification and addressing methods are replaced by a hardware Chip Select (CS) sig- nal. There are no broadcast commands. For every command, a card (slave) is selected by asserting SD Memory CARD (A) (SPI mode) Vdd Vss CLK,DataIN,DataOut SD Memory CARD (B) (SPI mode) Vdd Vss MultiMediaCard CARD (C) (SPI mode) Vdd Vss CLK,DataIN,DataOut Vdd Vss CLK, DataIN, DataOut HOST CLK,DataIN,DataOut CSCS(B) CSCS(A) CSCS(C) SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 10 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 SD Memory Card System Concept (active low) the CS signal (see Figure 3). The CS signal must be continuously active for the duration of the SPI transaction (command, response and data). The only exception occurs during card programming, when the host can de- assert the CS signal without affecting the programming process. The SPI interface uses the 7 out of the SD 9 signals (DAT1 and DAT 2 are not used, DAT3 is the CS signal) of the SD bus. 3.2 Bus Protocol 3.2.1 SD bus Communication over the SD bus is based on command and data bit streams which are initiated by a start bit and terminated by a stop bit. • Command: a command is a token which starts an operation. A command is sent from the host either to a single card (addressed command) or to all connected cards (broadcast command). A command is transferred serially on the CMD line. • Response: a response is a token which is sent from an addressed card, or (synchronously) from all connected cards, to the host as an answer to a previously received command. A response is transferred serially on the CMD line. • Data: data can be transferred from the card to the host or vice versa. Data is transferred via the data lines. Figure 4: “no response” and “no data” operations Card addressing is implemented using a session address, assigned to the card during the initializa- tion phase. The structure of commands, responses and data blocks is described in Chapter 4. The basic transaction on the SD bus is the command/response transaction (refer to Figure 4). This type of bus transactions transfer their information directly within the command or response structure. In addition, some operations have a data token. Data transfers to/from the SD Memory Card are done in blocks. Data blocks always succeeded by CRC bits. Single and multiple block operations are defined. Note that the Multiple Block operation mode is better for faster write operation. A multiple block transmission is terminated when a stop command follows on the CMD line. Data transfer can be configured by the host to use single or mul- tiple data lines. command command response operation (no response) operation (no data) CMD DAT from host to card(s) from host to card from card to host SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 11 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 SD Memory Card System Concept Figure 5: (Multiple) Block read operation The block write operation uses a simple busy signaling of the write operation duration on the DAT0 data line (see Figure 6) regardless of the number of data lines used for transferring the data. Figure 6: (Multiple) Block write operation Command tokens have the following coding scheme: Figure 7: Command token format Each command token is preceded by a start bit (‘0’) and succeeded by an end bit (‘1’). The total length is 48 bits. Each token is protected by CRC bits so that transmission errors can be detected and the operation may be repeated. command response command response block read operation data stop operation CMD DAT from host to card stop command stops data transfer data from card to host from card to host data block crc data block crc data block crc multiple block read operation command response command response block write operation data stop operation CMD DAT from host to card stop command stops data trans- fer data from host to card from card to host data block crc data block crc multiple block write operation busy busy crc ok response and busy from card 0 1 CONTENT 1 total length=48 bits start bit: always’0’ transmitter bit: ’1’= host command end bit: always ‘1’ Command content: command and address information or parameter, protected by 7 bit CRC checksum CRC SD C ar d As so cia tio n DO NOT COPY (c)2000 (c)2001 by SD Group (MEI,SanDisk,Toshiba) 12 Simplified Version Date: April 2001 SD-Memory Card Specifications / Part 1. Physical Layer Specification; Version 1.01 SD Memory Card System Concept Response tokens have four coding schemes depending on their content. The token length is either 48 or 136 bits. The detailed commands and response definition is given in Chapter 4.7. The CRC protection algorithm for block data is a 16 bit CCITT polynomial. All used CRC types are described in Chapter 4.5. Figure 8: Response token format In the CMD line the MSB bit is transmitted first the LSB bit is the last. when the wide bus option is used, the data is transferred 4 bits at a time (refer to Figure 9). Start and end bits, as well as the CRC bits, are transmitted for every one of the DAT lines. CRC bits are calculated and checked for every DAT line individually. The CRC status response and Busy indica- tion will be sent by the card to the host on DAT0 only (DAT1-DAT3 during that period are don’t care). Figure 9: Data packet format 0 0 CONTENT 1 total length=48 bits start bit: