基于51单片机信号发生器的设计——外文翻译

基于51单片机信号发生器的设计——外文翻译 城市学院 本 科 毕 业 设 计 论 文 目 The SCM and μVision2 所在系 电气与信息系 学生姓名 冉乾乾 专 业 电子信息工程 班 级 电信002 学号 10010085 指导教师 金印彬 2014 年 5 月 The SCM and µVision2 The SCM and µVision2 一、 Principle of MCU Single-chip is an integrated on a single chip a complete computer system. Even though most of his features in a small chip, but it has a need to complete the majority of computer components: CPU, memory, internal and external bus system, most will have the Core. At the same time, such as integrated communication interfaces, timers, real-time clock and other peripheral equipment. And now the most powerful single-chip microcomputer system can even voice, image, networking, input and output complex system integration on a single chip. Also known as single-chip MCU (Microcontroller), because it was first used in the field of industrial control. Only by the single-chip CPU chip developed from the dedicated processor. The design concept is the first by a large number of peripherals and CPU in a single chip, the computer system so that smaller, more easily integrated into the complex and demanding on the volume control devices. INTEL the Z80 is one of the first design in accordance with the idea of the processor, From then on, the MCU and the development of a dedicated processor parted ways. Early single-chip 8-bit or all of the four. One of the most successful is INTEL's 8031, because the performance of a simple and reliable access to a lot of good praise. Since then in 8031 to develop a single-chip microcomputer system MCS51 series. Based on single-chip microcomputer system of the system is still widely used until now. As the field of industrial control requirements increase in the beginning of a 16-bit single-chip, but not ideal because the price has not been very widely used. After the 90's with the big consumer electronics product development, single-chip technology is a huge improvement. INTEL i960 Series with subsequent ARM in particular, a broad range of applications, quickly replaced by 32-bit single-chip 16-bit single-chip high-end status, and enter the mainstream market. Traditional 8-bit single-chip performance has been the rapid increase in processing power compared to the 80's to raise a few hundred times. At present, the high-end 32-bit single-chip frequency over 300MHz, the performance of the mid-90's close on the heels of a special processor, while the ordinary price of the model dropped to one U.S. dollars, the most high-end models, only 10 U.S. dollars. Contemporary single-chip microcomputer system is no longer only the bare-metal environment in the development and use of a large number of dedicated embedded operating system is widely used in the full range of single-chip microcomputer. In PDAs and cell phones as the core processing of high-end single-chip or even a dedicated direct access to Windows and Linux operating systems. More than a dedicated single-chip processor suitable for embedded systems, so it was up to the application. In fact the number of single-chip is the world's largest computer. Modern human life used in almost every piece of electronic and mechanical products will have a single-chip integration. Phone, telephone, calculator, home appliances, electronic toys, handheld computers and computer accessories such as a mouse in the Department are 西安交通大学城市学院本科生毕业设计(外文翻译) equipped with 1-2 single chip. And personal computers also have a large number of single-chip microcomputer in the workplace. Vehicles equipped with more than 40 Department of the general single-chip, complex industrial control systems and even single-chip may have hundreds of work at the same time! SCM is not only far exceeds the number of PC and other integrated computing, even more than the number of human beings. Hardwave introduction The 8051 family of micro controllers is based on an architecture which is highly optimized for embedded control systems. It is used in a wide variety of applications from military equipment to automobiles to the keyboard on your PC. Second only to the Motorola 68HC11 in eight bit processors sales, the 8051 family of microcontrollers is available in a wide array of variations from manufacturers such as Intel, Philips, and Siemens. These manufacturers have added numerous features and peripherals to the 8051 such as I2C interfaces, analog to digital converters, watchdog timers, and pulse width modulated outputs. Variations of the 8051 with clock speeds up to 40MHz and voltage requirements down to 1.5 volts are available. This wide range of parts based on one core makes the 8051 family an excellent choice as the base architecture for a company's entire line of products since it can perform many functions and developers will only have to learn this one platform. The basic architecture consists of the following features: • an eight bit ALU • 32 descrete I/O pins (4 groups of 8) which can be individually accessed • two 16 bit timer/counters • full duplex UART • 6 interrupt sources with 2 priority levels • 128 bytes of on board RAM • separate 64K byte address spaces for DATA and CODE memory One 8051 processor cycle consists of twelve oscillator periods. Each of the twelve oscillator periods is used for a special function by the 8051 core such as op code fetches and samples of the interrupt daisy chain for pending interrupts. The time required for any 8051 instruction can be computed by dividing the clock frequency by 12, inverting that result and multiplying it by the number of processor cycles required by the instruction in question. Therefore, if you have a system which is using an 11.059MHz clock, you can compute the number of instructions per second by dividing this value by 12. This gives an instruction frequency of 921583 instructions per second. Inverting this will provide the amount of time taken by each instruction cycle (1.085 microseconds). 二、 The Introduction of AT89C51 1 Description The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible The SCM and µVision2 with the industry-standard MCS-51 instruction set. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications. 2 Function characteristic The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, one 5 vector two-level interrupt architecture, a full duplex serial port, one-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Description VCC:Supply voltage. GND:Ground. Port 0 Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 may also be configured to be the multiplexed address/data bus during accesses o external program and data memory. In this mode P0 has internal Pull-up resistor. Port 0 t also receives the code bytes during Flash programming, and outputs the code bytes during Program verification. External Pull-up resistors are required during Program verification. Port 1 Port 1 is an 8-bit bi-directional I/O port with internal Pull-up resistors. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal Pull-up resistors and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal Pull-up resistors. Port 1 also receives the low-order address bytes during Flash programming and verification. Port 2 Port 2 is an 8-bit bi-directional I/O port with internal Pull-up resistor. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal Pull-up resistor and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current, because of the internal Pull-up resistor. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. In this application, it uses strong internal Pull-up resistor when emitting 1s. During accesses to external data memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register. Port 2 西安交通大学城市学院本科生毕业设计(外文翻译) also receives the high-order address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8-bit bi-directional I/O port with internal Pull-up resistor. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal Pull-up resistor and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the Pull-up resistor. Port 3 lso serves the functions of various special features of the AT89C51 as listed below: a Port 3 also receives some control signals for Flash programming and verification. RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. PSEN Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP The SCM and µVision2 External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require12-volt VPP. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier. 3 Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1.Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Figure 1. Oscillator Connections Configuration Figure2. External Clock Drive 4 Idle Mode In idle mode, the CPU puts itself to sleep while all the on chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, 西安交通大学城市学院本科生毕业设计(外文翻译) the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. 5 Power-down Mode In the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. 6 Program Memory Lock Bits On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below. When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly. 三、 Getting Started with µVision2 The Keil Software 8051 development tools listed below are programs you use to compile your C code, assemble your assembly source files, link and locate object modules and libraries, create HEX files, and debug your target program. µVision2 for Windows? is an Integrated Development Environment that combines project management, source code editing, and program debugging in one single, powerful environment. The C51 ANSI Optimizing C Cross Compiler creates relocatable object modules from your C source code. The SCM and µVision2 The A51 Macro Assembler creates relocatable object modules from your 8051 assembly source code. The BL51 Linker/Locator combines relocatable object modules created by the C51 Compiler and the A51 Assembler into absolute object modules. The LIB51 Library Manager combines object modules into libraries that may be used by the linker. The OH51 Object-HEX Converter creates Intel HEX files from absolute object modules. The RTX-51 Real-time Operating System simplifies the design of complex, time-critical software projects. Software Development Cycle When you use the Keil Software tools, the project development cycle is roughly the same as it is for any other software development project. 1. Create a project, select the target chip from the device database, and configure the tool settings. 2. Create source files in C or assembly. 3. Build your application with the project manager. 4. Correct errors in source files. 5. Test the linked application. µVision2 IDE The µVision2 IDE combines project management, a rich-featured editor with interactive error correction, option setup, make facility, and on-line help. Use µVision2 to create your source files and organize them into a project that defines your target application. µVision2 automatically compiles, assembles, and links your embedded application and provides a single focal point for your development efforts. LIB51 Library Manager The LIB51 library manager allows you to create object library from the object files created by the compiler and assembler. Libraries are specially formatted, ordered program collections of object modules that may be used by the linker at a later time. When the linker processes a library, only those object modules in the library that are necessary to create the program are used. BL51 Linker/Locator The BL51 linker creates an absolute object module using the object modules extracted from libraries and those created by the compiler and assembler. An absolute object file or module contains no relocatable code or data. All code and data reside at fixed memory locations. The absolute object file may be used: To program an EPROM or other memory devices, With the µVision2 Debugger for simulation and target debugging, With an in-circuit emulator for the program testing. 西安交通大学城市学院本科生毕业设计(外文翻译) µVision2 Debugger The µVision2 symbolic, source-level debugger is ideally suited for fast, reliable program debugging. The debugger includes a high-speed simulator that let you simulate an entire 8051 system including on-chip peripherals and external hardware. The attributes of the chip you use are automatically configured when you select the device from the Device Database. The µVision2 Debugger provides several ways for you to test your programs on real target hardware: Install the MON51 Target Monitor on your target system and download your program using the Monitor-51 interface built-in to the µVision2 Debugger. Use the Advanced GDI interface to attach use the µVision2 Debugger front end with your target system. Monitor-51 The µVision2 Debugger supports target debugging using Monitor-51. The monitor program resides in the memory of your target hardware and communicates with the µVision2 Debugger using the serial port of the 8051 and a COM port of your PC. With Monitor-51, µVision2 lets you perform source-level, symbolic debugging on your target hardware. RTX51 Real-Time Operating System The RTX51 real-time operating system is a multitasking kernel for the 8051 microcontroller family. The RTX51 real-time kernel simplifies the system design, programming, and debugging of complex applications where fast reaction to time critical events is essential. The kernel is fully integrated into the C51 Compiler and is easy to use. Task description tables and operating system consistency are automatically controlled by the BL51 linker/locator. C51 Optimizing C Cross Compiler The Keil C51 Cross Compiler is an ANSI C Compiler that was written specifically to generate fast, compact code for the 8051 microcontroller family. The C51 Compiler generates object code that matches the efficiency and speed of assembly programming. Using a high-level language like C has many advantages over assembly language programming: Knowledge of the processor instruction set is not required. Rudimentary knowledge of the memory structure of the 8051 CPU is desirable (but not necessary). Details like register allocation and addressing of the various memory types and data types is managed by the compiler. Programs get a formal structure (which is imposed by the C programming language) and can be divided into separate functions. This contributes to source code reusability as well as better overall application structure. The SCM and µVision2 The ability to combine variable selection with specific operations improves program readability. Keywords and operational functions that more nearly resemble the human thought process may be used. Programming and program test time is drastically reduced. The C run-time library contains many standard routines such as: formatted output, numeric conversions, and floating-point arithmetic. Existing program parts can be more easily included into new programs because of modular program construction techniques. The language C is a very portable language (based on the ANSI standard) that enjoys wide popular support and is easily obtained for most systems. Existing program investments can be quickly adapted to other processors as needed. Code Optimizations The C51 Compiler is an aggressive optimizing compiler that takes numerous steps to ensure that the code generated and output to the object file is the most efficient (smallest and/or fastest) code possible. The compiler analyzes the generated code to produce the most efficient instruction sequences. This ensures that your C program runs as quickly and effectively as possible in the least amount of code space. The C51 Compiler provides nine different levels of optimizing. Each increasing level includes the optimizations of levels below it. The following is a list of all optimizations currently performed by the C51 Compiler. General Optimizations Constant Folding: Constant values occurring in an expression or address calculation are combined as a single constant. Jump Optimizing: Jumps are inverted or extended to the final target address when the program efficiency is thereby increased. Dead Code Elimination: Code that cannot be reached (dead code) is removed from the program. Register Variables: Automatic variables and function arguments are located in registers whenever possible. No data memory space is reserved for these variables. Parameter Passing Via Registers: A maximum of three function arguments may be passed in registers. Global Common Subexpression Elimination: Identical subexpressions or address calculations that occur multiple times in a function are recognized and calculated only once whenever possible. Common Tail Merging: Common instruction blocks are merged together using jump instructions. Re-use Common Entry Code: Common instruction sequences are moved in front of a function to reduce code size. 西安交通大学城市学院本科生毕业设计(外文翻译) The SCM and µVision2 单片机和keil 一、单片机原理 单片机是指一个集成在一块芯片上的完整计算机系统。尽管他的大部分功能集成在一块小芯片上，但是它具有一个完整计算机所需要的大部分部件:CPU、内存、内部和外部总线系统，目前大部分还会具有外存。同时集成诸如通讯接口、定时器，实时时钟等外围设备。而现在最强大的单片机系统甚至可以将声音、图像、网络、复杂的输入输出系统集成在一块芯片上。 单片机也被称为微控制器(Microcontroller)，是因为它最早被用在工业控制领域。单片机由芯片内仅有CPU的专用处理器发展而来。最早的设计理念是通过将大量外围设备和CPU集成在一个芯片中，使计算机系统更小，更容易集成进复杂的而对体积要求严格的控制设备当中。INTEL的Z80是最早按照这种思想设计出的处理器，从此以后，单片机和专用处理器的发展便分道扬镳。 早期的单片机都是8位或4位的。其中最成功的是INTEL的8031，因为简单可靠而性能不错获得了很大的好评。此后在8031上发展出了MCS51系列单片机系统。基于这一系统的单片机系统直到现在还在广泛使用。随着工业控制领域要求的提高，开始出现了16位单片机，但因为性价比不理想并未得到很广泛的应用。90年代后随着消费电子产品大发展，单片机技术得到了巨大的提高。随着INTEL i960系列特别是后来的ARM系列的广泛应用，32位单片机迅速取代16位单片机的高端地位，并且进入主流市场。而传统的8位单片机的性能也得到了飞速提高，处理能力比起80年代提高了数百倍。目前，高端的32位单片机主频已经超过300MHz，性能直追90年代中期的专用处理器，而普通的型号出厂价格跌落至1美元，最高端的型号也只有10美元。当代单片机系统已经不再只在裸机环境下开发和使用，大量专用的嵌入式操作系统被广泛应用在全系列的单片机上。而在作为掌上电脑和手机核心处理的高端单片机甚至可以直接使用专用的Windows和Linux操作系统。 单片机比专用处理器更适合应用于嵌入式系统，因此它得到了最多的应用。事实上单片机是世界上数量最多的计算机。现代人类生活中所用的几乎每件电子和机械产品中都会集成有单片机。手机、电话、计算器、家用电器、电子玩具、掌上电脑以及鼠标等电脑配件中都配有1-2部单片机。而个人电脑中也会有为数不少的单片机在工作。汽车上一般配备40多部单片机，复杂的工业控制系统上甚至可能有数百台单片机在同时工作～单片机的数量不仅远超过PC机和其他计算的综合，甚至比人类的数量还要多。 单片机硬件介绍: 8051系列微控制器是建立在一个高度优化的嵌入式控制系统的结构上。它的运用范围比较广，从军事装备到汽车再到你的PC机的键盘。仅次于摩托罗拉68HC11在8位处理器销售，8051家庭的微控制器, 在制造商上有各种各样的变化,如因特尔公司、 西安交通大学城市学院本科生毕业设计(外文翻译) 西门子、飞利浦。这些厂家已经增加了许多功能及外设，如总线接口,模拟到数字转换器,看门狗定时器、脉冲宽度调制的输出。8051的变化,达到40MHz时钟频率下降到150伏电压条件是可得到的。这种广泛的部分基于一个核心使8051系列的一个很好的选择作为基础架构的一个公司产品,因为它可以执行许多功能和开发者只会有这样的一个平台。 基本结构由以下特点: 一个8为的算术逻辑单元 32个离散输入输出端口(4组8位)可单独访问 二16位•定时器/计数器 全双工通用异步接收/发送装置 6个中断源与2个优先级别 128字节的随机存储器 64K分开字节地址空间的数据和代码的记忆 一个数字处理器周期共有十二振荡器的时期。他本是十二门徒里的每一个阶段是用于振荡器的特殊功能的核心,如凤凰社代码的数字和样品中的全部中断菊花链未决的中断。所需的时间任何8051指令可以除以12例,时钟频率通过反演结果和增殖它的数字处理器周期所指示的问题。因此,如果你有一个系统,使用一个11.059MHz时钟,可以计算出的指令数除以这个值每秒12分。这给出了921583指令每秒指令频率。反相这将提供每个指令周期(1.085微秒)采取的时间。 二、AT89C51的介绍 1 描述 AT89C51是一个低电压，高性能CMOS 8位单片机带有4K字节的可反复擦写的程序存储器(PENROM)。这种器件采用ATMEL公司的高密度、不容易丢失存储技术生产，并且能够与MCS-51系列的单片机兼容。片内含有8位中央处理器和闪烁存储单元，有较强的功能的AT89C51单片机能够被应用到控制领域中。 2 功能特性 AT89C51提供以下的功能标准:4K字节闪烁存储器，128字节随机存取数据存储器，32个I/O口，2个16位定时/计数器，1个5向量两级中断结构，1个串行通信口，片内震荡器和时钟电路。另外，AT89C51还可以进行0HZ的静态逻辑操作，并支持两种软件的节电模式。闲散方式停止中央处理器的工作，能够允许随机存取数据存储器、定时/计数器、串行通信口及中断系统继续工作。掉电方式保存随机存取数据存储器中的内容，但震荡器停止工作并禁止其它所有部件的工作直到下一个复位。 引脚描述 VCC:电源电压 GND:地 The SCM and µVision2 P0口 P0口是一组8位漏极开路双向I/O口，即地址/数据总线复用口。作为输出口时，每一个管脚都能够驱动8个TTL电路。当“1”被写入P0口时，每个管脚都能够作为高阻抗输入端。P0口还能够在访问外部数据存储器或程序存储器时，转换地址和数据总线复用，并在这时激活内部的上拉电阻。P0口在闪烁编程时，P0口接收指令，在程序校验时，输出指令，需要接电阻。 P1口 P1口一个带内部上拉电阻的8位双向I/O口，P1的输出缓冲级可驱动4个TTL电路。对端口写“1”，通过内部的电阻把端口拉到高电平，此时可作为输入口。因为内部有电阻，某个引脚被外部信号拉低时输出一个电流。闪烁编程时和程序校验时，P1口接收低8位地址。 P2口 P2口是一个内部带有上拉电阻的8位双向I/O口，P2的输出缓冲级可驱动4个TTL电路。对端口写“1”，通过内部的电阻把端口拉到高电平，此时，可作为输入口。因为内部有电阻，某个引脚被外部信号拉低时会输出一个电流。在访问外部程序存储器或16位地址的外部数据存储器时，P2口送出高8位地址数据。在访问8位地址的外部数据存储器时，P2口线上的内容在整个运行期间不变。闪烁编程或校验时，P2口接收高位地址和其它控制信号。 P3口 P3口是一组带有内部电阻的8位双向I/O口，P3口输出缓冲故可驱动4个TTL电路。对P3口写如“1”时，它们被内部电阻拉到高电平并可作为输入端时，被外部拉低的P3口将用电阻输出电流。 P3口除了作为一般的I/O口外，更重要的用途是它的第二功能，如下表所示: 端口引脚 第二功能 P3.0 RXD P3.1 TXD P3.2 INT0 P3.3 INT1 P3.4 T0 P3.5 T1 P3.6 WR P3.7 RD P3口还接收一些用于闪烁存储器编程和程序校验的控制信号。 RST 西安交通大学城市学院本科生毕业设计(外文翻译) 复位输入。当震荡器工作时，RET引脚出现两个机器周期以上的高电平将使单片机复位。 ALE/ PROG 当访问外部程序存储器或数据存储器时，ALE输出脉冲用于锁存地址的低8位字节。即使不访问外部存储器，ALE以时钟震荡频率的1/16输出固定的正脉冲信号，因此它可对输出时钟或用于定时目的。要注意的是:每当访问外部数据存储器时将跳过一个ALE脉冲时，闪烁存储器编程时，这个引脚还用于输入编程脉冲。如果必要，可对特殊寄存器区中的8EH单元的D0位置禁止ALE操作。这个位置后只有一条MOVX和MOVC指令ALE才会被应用。此外，这个引脚会微弱拉高，单片机执行外部程序时，应设置ALE无效。 PSEN 程序储存允许输出是外部程序存储器的读选通信号，当AT89C51由外部程序存储器读取指令时，每个机器周期两次PSEN 有效，即输出两个脉冲。在此期间，当访问外部数据存储器时，这两次有效的PSEN 信号不出现。 EA/VPP 外部访问允许。欲使中央处理器仅访问外部程序存储器，EA端必须保持低电平。需要注意的是:如果加密位LBI被编程，复位时内部会锁存EA端状态。如EA端为高电平，CPU则执行内部程序存储器中的指令。闪烁存储器编程时，该引脚加上+12V的编程允许电压VPP，当然这必须是该器件是使用12V编程电压VPP。 XTAL1:震荡器反相放大器及内部时钟发生器的输入端。 XTAL2:震荡器反相放大器的输出端。 3 时钟震荡器 AT89C51中有一个用于构成内部震荡器的高增益反相放大器，引脚XTAL1和XTAL2分别是该放大器的输入端和输出端。这个放大器与作为反馈元件的片外石英晶体或陶瓷谐振器一起构成自然震荡器。 外接石英晶体及电容C1，C2接在放大器的反馈回路中构成并联震荡电路。对外接电容C1，C2虽然没有十分严格的要求，但电容容量的大小会轻微影响震荡频率的高低、震荡器工作的稳定性、起振的难易程序及温度稳定性。如果使用石英晶体，我们推荐电容使用30PF?10PF，而如果使用陶瓷振荡器建议选择40PF?10PF。用户也可以采用外部时钟。采用外部时钟的电路如图示。这种情况下，外部时钟脉冲接到XTAL1端，即内部时钟发生器的输入端，XTAL2则悬空。由于外部时钟信号是通过一个2分频触发器后作为内部时钟信号的，所以对外部时钟信号的占空比没有特殊要求，但最小高电平持续时间和最大的低电平持续时间应符合产品技术条件的要求。 The SCM and µVision2 内部振荡电路 外部振荡电路 4 闲散节电模式 AT89C51有两种可用软件编程的省电模式，它们是闲散模式和掉电工作模式。这两种方式是控制专用寄存器PCON中的PD和IDL位来实现的。PD是掉电模式，当PD=1时，激活掉电工作模式，单片机进入掉电工作状态。IDL是闲散等待方式，当IDL=1，激活闲散工作状态，单片机进入睡眠状态。如需要同时进入两种工作模式，即PD和IDL同时为1，则先激活掉电模式。在闲散工作模式状态，中央处理器CPU保持睡眠状态，而所有片内的外设仍保持激活状态，这种方式由软件产生。此时，片内随机存取数据存储器和所有特殊功能寄存器的内容保持不变。闲散模式可由任何允许的中断请求或硬件复位终止。终止闲散工作模式的方法有两种，一是任何一条被允许中断的事件被激活，IDL被硬件清除，即刻终止闲散工作模式。程序会首先影响中断，进入中断服务程序，执行完中断服务程序，并紧随RETI指令后，下一条要执行的指令就是使单片机进入闲散工作模式，那条指令后面的一条指令。二是通过硬件复位也可将闲散工作模式终止。需要注意的是:当由硬件复位来终止闲散工作模式时，中央处理器CPU通常是从激活空闲模式那条指令的下一条开始继续执行程序的，要完成内部复位操作，硬 西安交通大学城市学院本科生毕业设计(外文翻译) 件复位脉冲要保持两个机器周期有效，在这种情况下，内部禁止中央处理器CPU访问片内RAM，而允许访问其他端口，为了避免可能对端口产生的意外写入:激活闲散模式的那条指令后面的一条指令不应是一条对端口或外部存储器的写入指令。 5 掉电模式 在掉电模式下，振荡器停止工作，进入掉电模式的指令是最后一条被执行的指令，片内RAM和特殊功能寄存器的内容在中指掉电模式前被冻结。退出掉电模式的唯一方法是硬件复位，复位后将从新定义全部特殊功能寄存器但不改变RAM中的内容，在VCC恢复到正常工作电平前，复位应无效切必须保持一定时间以使振荡器从新启动并稳定工作。 闲散和掉电模式外部引脚状态。 程序存储PSEN模式 ALE P0 P1 P2 P3 器 闲散模式 内部 1 1 数据 数据 数据 数据 闲散模式 内部 1 1 浮空 数据 地址 数据 掉电模式 外部 0 0 数据 数据 数据 数据 掉电模式 外部 0 0 数据 数据 数据 数据 6 程序存储器的加密 AT89C51可使用对芯片上的三个加密位LB1，LB2，LB3进行编程(P)或不编程(U)得到如下表所示的功能: 程序加密位 保护类型 1 U U U 没有程序保护功能 禁止从外部程序存储器中执行MOVC指令读取内部程序存储器2 P U U 的内容 3 P P U 除上表功能外，还禁止程序校验 4 P P P 除以上功能外，同时禁止外部执行 当LB1被编程时，在复位期间，EA端的电平被锁存，如果单片机上电后一直没有复位，锁存起来的初始值是一个不确定数，这个不确定数会一直保存到真正复位位置。为了使单片机正常工作，被锁存的EA电平与这个引脚当前辑电平一致。机密位只能通过整片擦除的方法清除。 三、 Keil C 简介 Keil Software 的8051开发工具提供以下程序，你可以用它们来编译你的C源码，汇编你的汇编源程序，连接和重定位你的目标文件和库文件，创建HEX文件，调试你的目标程序。 The SCM and µVision2 Windows应用程序uVision2是一个集成开发环境，它把项目管理，源代码编辑，程序调试等集成到一个功能强大的环境中。 C51美国标准优化C交叉编译器从你的C源代码产生可重定位的目标文件。 A51宏汇编器从你的8051汇编源代码产生可重定位的目标文件。 BL51连接/重定位器组合你的由C51和A51产生的可重定位的目标文件，生成绝对目标文件。 LIB51库管理器组合你的目标文件，生成可以被连接器使用的库文件。 OH51目标文件到HEX的转换器从绝对目标文件创建Intel HEX 格式的文件。 RTX-51实时操作系统简化了复杂和对时间要求敏感的软件项目。 软件开发 当你使用Keil Software工具时，你的项目开发流程和其它软件开发项目的流程极其相似。 1. 创建一个项目，从器件库中选择目标器件，配置工具设置。 2. 用C语言或汇编语言创建源程序。 3. 用项目管理器实现你的应用。 4. 修改源程序中的错误。 5. 测试，连接应用。 uVision2 IDE uVision2 集成开发环境集成了一个项目管理器，一个功能丰富、有错误提示的编辑器，以及设置选项，生成工具，在线帮助。利用uVision2创建你的源代码并把它们组织到一个能确定你的目标应用的项目中去。uVision2自动编译，汇编，连接你的嵌入式应用，并为你的开发提供一个单一的焦点。 C51编译器和A51汇编器 源代码由uVision2 IDE创建，并被C51编译或A51汇编。编译器和汇编器从源代码生成可重定位的目标文件。Keil C51编译器完全遵照ANSI C语言标准，支持C语言的所有标准特性。另外，直接支持8051结构的几个特性被添加到里面。Keil A51宏汇编器支持8051及其派生系列的全部指令集。 LIB51 库管理器 LIB51库管理器允许你从由编译器或汇编器生成的目标文件创建目标库。库是一种被特别地组织过并在以后可以被连接重用的对象模块。当连接器处理一个库时，仅仅那些被使用的目标模块才被真正使用。 BL51 连接器/定位器 BL51 连接器/定位器利用从库中提取的目标模块和由编译器或汇编器生成的目标模块创建一个绝对地址的目标模块。一个绝对地址目标模块或文件包含不可重定位的 西安交通大学城市学院本科生毕业设计(外文翻译) 代码和数据。所有的代码和数据被安置在固定的存储器单元中。此绝对地址目标文件可以用来: 写入EPROM或其它存储器件。 由uVision2调试器使用来模拟和调试。 由仿真器用来测试程序。 uVision2 调试器 uVision2源代码级调试器是一个理想地快速，可靠的程序调试器。此调试器包含一个高速模拟器，能够让你模拟整个8051系统，包括片上外围器件和外部硬件。当你从器件库中选择器件时，这个器件的特性将自动配置。 uVision2调试器为你在实际目标板上测试你的程序提供了几种方法: 安装MON51目标监控器到你的目标系统并且通过Monitor-51接口下载你的程序。 利用高级的GDI(AGDI)接口，把uVision2调试器绑定到你的目标系统。 Monitor-51 uVision2调试器支持用Monitor-51进行目标板调试。此监控程序驻留在你的目标板的 存储器里，它利用串口和uVision2调试器进行通信。利用Monitor-51，uVision2调试器 可以对你的目标硬件实行源代码级的调试。 RTX51实时操作系统 RTX51实时操作系统是一个针对8051系列的多任务核。RTX51实时内核从本质上简化了对实时事件反应速度要求高的复杂应用系统的设计，编程和调试。RTX51实时内核是完全集成到C51编译器中的，从而方便使用。任务描述表和操作系统的连接由BL51连接器/定位器自动控制。 C51优化的C语言交叉编译器 Keil C51交叉编译器是一个基于ANSI C标准的针对8051系列MCU的C编译器，生成的可执行代码快速、紧凑，在运行效率和速度上可以和汇编程序得到的代码相媲美。 和汇编语言相比，用C语言这样的高级语言有很多优势，比如: 对处理器的指令集不必了解，8051 CPU的基本结构可以了解，但不是必须的。 寄存器的分配以及各种变量和数据的寻址都由编译器完成。 程序拥有了正式的结构(由C语言带来的)，并且能被分成多个单独的子函数。这使整个应用系统的结构变得清晰，同时让源代码变得可重复使用。 选择特定的操作符来操作变量的能力提高了源代码的可读性。 可以运用和人的思维很接近的词汇和算法表达式。 编写程序和调试程序的时间得到很大程度的缩短。 C运行连接库包含一些标准的子程序，如:格式化输出，数字转换，浮点运算。 The SCM and µVision2 由于程序的模块结构技术，使得现有的程序段可以很容易的包含到新的程序中去。 ANSI 标准的C语言是一种丰常方便的，获得广泛应用的，在绝大部分系统中都能够很容易得到的语言。 因此，如果需要，现有的程序可以很快地移植到其他的处理器上，节省投资。 代码优化 C51是一个杰出的优化编译器，它通过很多步骤以确保产生的代码是最有效率的(最小和/或最快)。编译器通过初步的代码 产生最终的最有效率的代码序列，以此来保证你的C语言程序占用最少空间的同时运行的快而有效。 C51编译器提供9个优化级别。每个高一级的优化级别都包括比它低的所有优化级别的优化内容。以下列出的是目前C51编译器提供的所有优化级别的内容: 常量折叠:在表达式及寻址过程中出现的常量被综合为一个单个的常量。 跳转优化:采用反转跳转或直接指向最终目的的跳转，从而提升了程序的效率。 哑码消除:永远不可能执行到的代码将自动从程序中剔除。 寄存器变量:只要可能，局部变量和函数参数被放在CPU寄存器中，不需要为这些变量再分配存储器空间。 通过寄存器传递参数:最多三个参数通过寄存器传递。 消除全局公用的子表达式:只要可能，程序中多次出现的相同的子表达式或地址计算表达式将只计算一次。 合并相同代码:利用跳转指令，相同的代码块被合并。 重复使用入口代码:需要多次使用的共同代码被移到子程序的前面以缩减代码长度。 公共块子程序:需要重复使用的多条指令被提取组成子程序。指令被重新安排以最大化一个共用子程序的长度。