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长春大学毕业设计(论文)译文

2020-03-09 12页 doc 39KB 11阅读

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长春大学毕业设计(论文)译文长 春 大 学 毕业设计(论文)译文纸 共 7 页 第 1 页 ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ 装 ┊ ┊ ┊ ┊ ┊ 订 ┊ ┊ ┊ ┊ ┊ 线 ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ Structure and function of the MCS-51 series Structure and function of the MCS-51 series one-chip computer MCS-51 is ...
长春大学毕业设计(论文)译文
长 春 大 学 毕业设计(论文)译文纸 共 7 页 第 1 页 ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ 装 ┊ ┊ ┊ ┊ ┊ 订 ┊ ┊ ┊ ┊ ┊ 线 ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ ┊ Structure and function of the MCS-51 series Structure and function of the MCS-51 series one-chip computer MCS-51 is a name of a piece of one-chip computer series which Intel Company produces. This company introduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It belong to a lot of kinds this line of one-chip computer the chips have, such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic composition, basic performance and instruction system are all the same. 8051 daily representatives 51 serial one-chip computers. A one-chip computer system is made up of several following parts: (1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositing not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. ( 3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some one-chip computers, such as 8031 , 8032, 80C ,etc. ( 4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. ( 5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can according to count or result of timing realize the control of the computer. ( 7) One all depleting serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize one-chip computer or one-chip computer and serial communication of computer to use for. (8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahits now at most. Every the above-mentioned part was joined through the inside data bus .Among them, CPU is a core of the one-chip computer, it is the control of the computer and command centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporalities of 8, storing device 2 temporarily, 8's accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, come from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 inside. The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter, the ┊┊┊┊┊┊┊┊┊┊┊┊┊装┊┊┊┊┊订┊┊┊┊┊线┊┊┊┊┊┊┊┊┊┊┊┊┊order is deposited, the order deciphers the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of 1.2MHZ. This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is commanded. There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of computer. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc.. In RAM of this 128B, there is unit of 32 bytes that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in addition. General computer for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing different address space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH, 0000H of location, in unison outside the slice (use 16 addresses). (2) The data memory address space outside one of 64KB, the address is arranged from 0000H 64KB FFFFH (with 16 addresses) too to the location. (3) Data memory address space of 256B (use 8 addresses). Three above-mentioned memory space addresses overlap, for ┊┊┊┊┊┊┊┊┊┊┊┊┊装┊┊┊┊┊订┊┊┊┊┊线┊┊┊┊┊┊┊┊┊┊┊┊┊distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice. 8051 one-chip computer have four 8 walk abreast I/O port, call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, accounts for 32 pins altogether. Every one I/O line can be used as introduction and exported independently. Each port includes a latch (namely special function register), one exports the driver and a introduction buffer. Make data can latch when outputting, data can buffer when making introduction , but four function of pass way these self-same. Expand among the system of memory outside having slice, four ports these may serve as accurate two-way mouth of I/O in common use. Expand among the system of memory outside having slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus, send the introduction of 8 low addresses and data / export in timesharing Output grade, P3 of mouth, P1 of P1, connect with inside have load resistance of drawing, every one of they can drive 4 Model LS TTL load to output. As while inputting the mouth, any TTL or NMOS circuit can drive P1 of 8051 one-chip computers as P3 mouth in a normal way. Because draw resistance on output grade of them have, can open a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outer. Mouths are all accurate two-way mouths too. When the conduct is input, must write the corresponding port latch with 1 first. As to 80C51 one-chip computer, port can only offer milliamp ere of output electric currents, is it output mouth go when urging one ordinary basing of transistor to regard as, should contact a resistance among the port and transistor base, in order to the electricity while restraining the high level from exporting P1~P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H initially, make the one-chip computer begin to hold the conduct procedure from unit 0000H. Except that the ones that enter the system are initialized normally, as because procedure operate it make mistakes or operate there aren't mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in 8051 China RST pin. Restore to the throne signal high level effective, should sustain 24 shake cycle (namely 2 machine cycles) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to finish restoring to the throne and operating. ┊┊┊┊┊┊┊┊┊┊┊┊┊装┊┊┊┊┊订┊┊┊┊┊线┊┊┊┊┊┊┊┊┊┊┊┊┊Produce the logic picture of circuit which is restored to the throne the signal: Restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produces to restore to the throne signal (RST) hand over to Schmitt's trigger, restore to the throne circuit sample to output, Schmitt of trigger constantly in each S5P2, machine of cycle in having one more, then just got and restored to the throne and operated the necessary signal inside. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of one-chip computer system could normal running, should first check it can restore to the throne not succeeding. Checking and can pop one's head and monitor the pin with the oscillograph tentatively, push and is restored to the throne the key, the wave form that observes and has enough range is exported (instantaneous), can also through is it restore to the throne circuit group holding value carry on the experiment to change. ┊┊┊┊┊┊┊┊┊┊┊┊┊装┊┊┊┊┊订┊┊┊┊┊线┊┊┊┊┊┊┊┊┊┊┊┊┊ 51系列单片机的功能和结构 结构和功能的监控监-51系列之一--计算机芯片监控监-51名是一幅一个电脑晶片,英特尔公司生产系列. 这家公司推出8级一个计算机芯片监控监-51系列之后,于1980年8引入一个计算机芯片监控监,于1976年48系列.。它属于这一类型很多行一个芯片的电脑芯片都如8051、8031、8751、80c51bh,80c31bh等,其基本组成、性能和基本教学制度,都是一样的. 8051每日代-51系列之一--电脑晶片有一个芯片的计算机系统是由以下几个方面: (1)18微处理器(CPU). (2)在切片数据存储羊(128B/256B),使用可以不读不数据写如因经营不中,最后结果要和数据显示等. (3)存储器存储程序/可擦写可编程只读存储器(4KB/8KB),用于保存程序和数据,初步形成片. 但并不存储器/可擦写可编程只读存储器在一些人的电脑芯片,如8031、8032、80c等. (4)经营的84并肩一/四OP0P3接口,每口可以用作介绍,也可以用作输出. (5)两个定时/柜台,每个计时器/柜台可设立和计算的方法,用来计算的外部事件,可以建立成一个时间的方式也可以和根据计算结果或时间实现控制的计算(六)五切断切断源头上控制系统. (七)各一序I/O口UART(异步接收世界/发送(UART)),它是实现一个计算机芯片和一个计算机芯片和通讯系列电脑上使用. (8)强、时钟振荡器电路生产、水晶石英细调需要外部电容. 为使振动频率目前最. 每上述地区内的数据是通过加入单片机. 其中,CPU的核心是一个电脑芯片,它是计算机和指挥控制中心等部分组成,运算器和控制等. 运算器的可携带8人计算a经营单位的经营逻辑,其中,1temporarilies存储装置8、暂时贮存器2、8的行政协调会累积装置、B、注册登记程序国有PSW等. 累积计200人,行政协调委员会结束对进入检查. 暂时运作往往是来自一店经营者,这是经营下去,使计暂时经营成果和行政协调会. 此外,行政协调会经常被视为转运站,在8051年的数据传输. 一般微处理器一样,是繁忙登记. 帮助大家,表示了赞同的命令. 控制程序包括柜台命令详解,振荡器电路和时间等. 程序相当于16. 这是一个字节地址位的程序,其实,内容是未来IA将进行PC. 修改的内容,它可以改变方向,进行程序. 在8051电路动摇一个电脑芯片、石英晶体外,只需要相当频繁调整电容,其范围是12mhz的频率1.2mhz. 这一脉冲信号,作为8051年工作的基本节拍,即单位时间内的最低. 8051年是计算机一样,在和谐的工作基本控制打,就像打了一个乐团,按照发挥,指挥. 有存储器(程序存储器,只能读),8051年在羊片(存储数据,是可以写出)二读,他们每个独立存储空间处理,处理方式是一样的,一般的电脑记忆. 8051年和8751年拨款程序存储程序存贮器4kb,从0000h地址,用于保存程序和方式不变. 数据128b记忆存储数据,00fh假地址,用于存放操作结果中,暂时储存数据和等无人。在这种羊128b,有32个单位字节可以出任就业登记,这是与一般不同的微处理器、8051切片和就业登记成立一个级别相同的地点安排. 这是很不相同的记忆监控监-51系列之一--计算机芯片,除了一般电脑的方式处置. 一般电脑先向空间、存储器和RAM,可安排在不同的空间范围内解决这一意愿,即存储器的地址和RAM,地址分配不同的空间形成. 同时来访的记忆,相应的存储器,只有一个地址,可以存储,也可以撞击,并以同样的访问. 这种记忆结构称为普林斯顿结构. 8051记忆分为程序存储空间和数据存储空间的物理结构,有四个存储空间:我们的程序储存在一个数据存储空间之外的数据存储和一个程序存储空间、外一、结构形式的这种程序装置和数据存储与形式的数据存储,称为哈佛结构. 但用用户的角度,讨论8051年的记忆空间分为三类:(1)在时代安排Ffffh座,0000h地点、从容外片(地址用十六). (二)处理数据存储空间之外64kb之一,被安排从地址0000hFfffh64kb(地址16),地点太. 三)处理数据存储空间256b(地址8使用). 上述三个存储空间地址重叠,鉴别设计,象征不同的数据传输的语 ┊┊┊┊┊┊┊┊┊┊┊┊┊装┊┊┊┊┊订┊┊┊┊┊线┊┊┊┊┊┊┊┊┊┊┊┊┊言系统8051:CPU访问片,以存储器,阻止访问命令Ra用途外用一张旅游片。 8051年1-48芯片计算机与我走/澳港,要求P0、P1、P2和P3. 每个港口8准确双向口,共占32别针. 每一个我/O线可作为引进和输出独立. 每个港口有门闩(即登记特殊功能)、驾驶人、出口实行缓冲. 可当门闩使outputting数据,数据可以缓冲时推出,但这些四个功能自我同一. 在扩大对外开放具有时代记忆系统,这四个港口可准确双向口一/O共同使用。在扩大对外开放具有时代记忆系统,高8P2口地址见客. P0口是一个双向车采用8送数据低地址/出口Timesharing 在8051年的巡回一个计算机芯片和四个一/O港口很巧妙的设计. 熟悉我/港澳逻辑电路,不仅有利于正确、合理地使用港口、激励周边逻辑电路设计的一个计算机芯片有所提高. 负载能力和接口港口有一定的要求,因为产量等,P0和P1口的最终产量、P3口的结构,在不同的年级,所以,负载能力和接口要求其门南辕北辙相处. 不同于其他P0口口,其产量即将年级抵抗.。在使用它的嘴巴,用共同使用,是生产事故等级亮起电路,它是利用NMOS呼吁采取抵制外,应同时输入,走出失败. 当被用作介绍,应该写"一"的门闩头. 每一个有能驾驶8P0口输出模式LSTTL载荷. P1口是一个正确的双向口也作为我/海外广泛使用. P0口不同产量的电路,请联系电力负荷就在有阻力. 事实上,反抗是两种影响,同时负责操作:1配量负责,定期阻力. 另一种可能是导致这两个国家与接近,使总经理改变阻值近似零或一组值两形势十分沉重. 0时,大约是反抗,可以寄以很高的速度; 如果阻值很大,P1口,以妨碍国家引进高. P1口高产量的电力平时,它是利用电流负载提供庇护,以此抵制和不必回答. 在这里介绍的是用作码头,必须写1到相应的门闩头也使操作结束。相对约20,000ohms因负载阻力,因为在现场40,000ohms,不会产生影响的数据,输入. P2口的结构有些类似于P0口有开关. 这是促使口腔类似,但有些不是嘴巴大转换控制P1. P3口人的多功能港口,嘴也越来越多,P1比"、"3和4缓冲门". 这两个部分,使她除了精确的双向功能与P1口仅,也可以使用第二功能每针. "、"一门三转功能实际上它决定将产量数据信号门闩第二产出功能. 在担任W=1时,问到生产信号; 作为在Q=1时,信号线可以生产W. 节目时,它是第一个功能,但仍是第二个功能不用软件P3口提前成立. 这不是硬件是在自动有两个功能outputted当CPU进行社会主义和寻求地点(所在地或字节)访P3口/不是在持久排队,有在硬件门闩促使=1.THE经营原则P3口类似于P1口. 生产级的P3口,P1,P1,内有连接负载阻力划,每个人可以带动4产出模型LSTTL 载荷. 而作为输入口,任何NMOS电路可驱动TTL或P1的8051一个电脑芯片P3口的正常发展. 由于产量等作出抵抗的人,也可以公开方式收藏或流失的根源就是反抗的方式,要求公开,不须具备抵抗绘画. 别人都准确双向口也. 当行为投入,要写出一首相应的港口与门闩. 以80c51一个计算机芯片,只能提供港口毫安的电流电产出,它是生产口去要求一个普通的计算是将晶体管、接触的阻力应该在港口及半导体基地同时为了抑制高电力输出P1~P3级是恢复王位是一个着手运作一个计算机芯片. 其主要功能是将电脑变成0000h开始,使一个开始进行计算机芯片进行程序0000h单位. 除了那些进入正常initialized系统,因为它的程序操作失误或操作失误不多,为了摆脱困境,必须按国家和恢复王位,恢复太重要了. 这是一项投入恢复王位,结束了在8051年中国信息表寄. 恢复王位高有效信号,应保持24震撼周期(机器周期,2)有效时间段. 6如果使用频率前去辉煌,恢复王位信号完成期限不得超过4微妙的王位,恢复营业. 逻辑电路生产情况,恢复王位的信号: 恢复王位的电路两部分组成,包括外部的芯片完全. 外界产生电路恢复王位信号 ┊┊┊┊┊┊┊┊┊┊┊┊┊装┊┊┊┊┊订┊┊┊┊┊线┊┊┊┊┊┊┊┊┊┊┊┊┊(表)交给史密特的启动,恢复王位样品电路产量,史密特触发不断每一s5p2、机器周期有一次,光有与恢复王位和经营所需insidly信号. 恢复王位抵抗一般线路、电容参数适合6精彩震撼,是否能恢复王位高信号机会大于2周期保证. 正在恢复王位是简单的电路,其作用是非常重要的. 张一电脑芯片系统可正常运作,应先检查一下,才能恢复王位没有成功. 检测可以流行头和监督寄与初步示波器,并把恢复王位的关键,波的形式,并认为有足够的距离输出(瞬间),也就是通过它来恢复电路值进行实现改变。
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