魅族M8原理图

NAME: eric.huang 2008.09.22 MEIZU M8 V8 A1 v1 1 14 REV:SIZE:CODE: DRAWN: DATED: DATED:CHECKED: QUALITY CONTROL: DATED: DATED:RELEASED: COMPANY: TITLE: SHEET: OFSCALE: REVISION RECORD A B C D DATE: 123456 D C B A LTR ECO NO: APPROVED: 2007.8.13: CHANGED 6400X51 INFORMATION :POP_VCCQ,POP_VCC CHANGED TO 1.8V 2007.6.13: S3C6400 CHANGED TO X51 2007.6.1: CODEC CHANGED TO WM9713 2007.7.1: CODEC CHANGED TO WM8753 2007.7.25: changed lcd pin information . 2007.8.7: CHANGED CAMERA INFORMATION 2007.8.14: WIFI_BLUETOOTH SCH IS PREPARED 2007.8.15: gsm module is ok 2007.8.15: IRMODULE IS PREPARED 2007.8.18: delete mic switch.add jtac of bluetooth and wifi. change vdd2.5v to Vrtc.seperate gnd and adgnd by r124 VERSION 2007.8.29: add earphone jack(j201) .delete pcm mclk ,add pcm clk 2007.8.30: changed camera part .need mor information to confirm :pwdn level .pin sequense,and there are 10 bit data ,yuv need 8 bit data. 2007.8.31: changed photo_sensor to avago,add emi filter of audio speaker to prevent pwm emi of d amplifer,changed stf202 to eclamp0502b to prevent interfere of usb 2.0 2007.9.1: MOTO CHANGED TO VMT-04 (AAC) 2007.9.5:add c139.c240 for filtrate high frequently noise 2007.9.7:add r518,r519,r520,tp519.changed r511,r515 2007.9.9:changed camera pin map . 2007.9.9:changed accelary sensor to mem 2007.9.9:add a buck to creat pll1.0v .add system 3.0v.add otg3.0v add otg 1.0v delet onelnand to use nand plash . 2007.9.28: add movinand instead of nand flash (6400 only support 1.8v outside nandflash) 2007.9.28: use 6400-x51 instead of 6400-x52 for mor capacity of ddrsdram 2007.9.28: add R913,R914 for resistance control 2007.9.28: used i2s of 8876 instead of codec 8753( give up record by bluetooth) 2007.9.28: used differential input for micphone to pmb8876 .removed audio mic switch 2007.9.28: add a feedback of bfclkout to pmb 8876 by R1208 2007.9.28: used combone memory pf38f2030w0ytq1 insted of pf38f2030w0ytq0 for asynchronis mode 2007.9.28: used 3v gpio of 6400 to power on sm_power instead of used a switch to bat 2007.9.28: add c1122 to vbus of am_power to avoid supply float . 2007.9.28: add c1119 for vib bypass capacity 2007.9.28: add c1121 for vbat bypass capacity 2007.9.28: remove pullup resister of debug of pmb8876 2007.9.28: add r1037,r1038,rc1032 to reset to pmb 8876 2007.10.30: changed power to ltc 3555 2007.10.30: changed memory to movenand 2007.11.12: ADD P-MOS AND NPN IN SM-POWER FOR OPENING THE GSM SYSTEM 2007.11.12: add a resister IN the middle pin of battery to connect a ad convertor 2007.11.21 changed R843,R845 R846 to 1M ohm ,and changed c847 ,c848,c849 to 4.7NF to improve performence of touch panel 2007.11.28: debug: uart: capacitor from v- must connect to vdd to boost voltage 2007.12.04:48M CRYSTAL IS NOT WORKING . 2007.12.07:USE BATTERY CONNECTOR TO DETEC BATERRY DEFAULT AS SHEMATIC. . 2007.12.13:add R406 ,R407,R408,R409 in spi of lcd to separate 1.8vI/O for lcd from 3.0vI/O for 6400 2007.12.07:changed c1105,c1106 from 2.2u to 10u ,changed c625 from 10u to 100u 2007.12.28: The spi of lcd use 1.8V I/O instead of 3.0v I/O . LIST :CLK GPQ8, SIN CPQ7, SOUT GPQ5, SCS CPQ6, RESET GPQ4 2007.12.28: THE PACKAGE OF MOVENAND is changed to 14mm*18mm 2007.12.28: the bluetooth moudle is changed to BTTM46C2SB,and the wifi moudle is changed to SWL-N10 2008.1.5: ADD 2.8V LDO FOR LCD POWER 2008.1.5: ADD TWO KEYS : KEY 4,KEY 5 2008.1.5: USE gpio GPD4 from 6400 to open smpower 2008.1.10: USE gpio GPD1 to control vibrator 2008.1.10: USE rt9292 to instead of rt9284b 2008.1.11: use pin4 to detect headphone's inputing 2008.1.11: chaneged j301 to axk724147g for camera 2008.1.11: chaneged j803 to axk724147g for touchpanel 2008.1.11: delete rtc ic U105 so it can not wake mobile up after power off . add a ldo U604 to create 2.5v for rtc 2008.3.8 :use s3c6410 -x51 .so changed list : delete rt8023 ,rt9266,rt9702 ,i2c1 is used by touchpanle ,remove host power changed pin information of usb connector ,add 1.8v on movenand ,add test point on urat0 for wifi testing . 2008.4.17: add new reser IC u605 instead of reset from ltc3555. 2008.4.17: add a diodes in pbstat to seperate v3.3v from v3.0v,add a 3.0v from vbus to open the system 2008.4.22delete external mic ,add module insert detect and key adc add low voltage detect ic u607, add new reset ic u606 changed ltc3555 control .use i/o control instead of iic control . 08.09.18:ADD 1.2V LDO FOR WIFI ,CHANGED TSP POWER FROM 3.3V TO 3.0V V8 2008.09.22 SHEET NAME: MCU_6400 eric.huang MEIZU M8 A1 v1 2 14 REV:SIZE:CODE: DRAWN: DATED: DATED:CHECKED: QUALITY CONTROL: DATED: DATED:RELEASED: COMPANY: TITLE: SHEET: OFSCALE: REVISION RECORD A B C D DATE: 123456 D C B A LTR ECO NO: APPROVED: TO CAMERA TVOUT LCD IIS J102 [XDB][SN][X4][X3][X2] [X1][XOM0]booting mode nand 521/3 cycle NOR/SRAM Onenand MODEM nand 521/4 cycle Anand 2K/4 cycle Anand 2K/5 cycle internal rom [x] [0] [x] [x] [1] [1] [1] [1] [0] [0] [0] [0] [0] [0] [0] [1] [0] [0] [0] [0] [1] [1] [1] [1] [0] [0] [1] [1] [0] [1] [1] [1] [0] [0] 0 8bit [1] [1] 1 16bit [0] [1] [1] 1 e c x t c l k 0 X T I 1 A R M 1 1 J T A C 0 P E R I P H E R A L J T A C 080114 08.04.07 04.29 05.31 version 0 0 0 0 version 1 0 0 1 0 1 0 1 0 0 version 2 version 3 R143 R144 R145 NC NC NC NC NC 100K NC 100K 100K NC NC NC version control need a buffer from 1.8v to 3.0v 10.13 10.13 XM0ADDR0 XM0ADDR1 XM0ADDR2 XM0ADDR3 XM0ADDR4 XM0ADDR5 XM0ADDR6/GPO6 XM0ADDR7/GPO7 XM0ADDR8/GPO8 XM0ADDR9/GPO9 XM0ADDR10/GP O10 XM0ADDR11/GP O11 XM0ADDR12/GP O12 XM0ADDR13/GP O13 XM0ADDR14/GP O14 XM0ADDR15/GP O15 XM 0DATA0 XM 0DATA1 XM 0DATA2 XM 0DATA3 XM 0DATA4 XM 0DATA5 XM 0DATA6 XM 0DATA7 XM 0DATA8 XM 0DATA9 XM 0DATA10 XM 0DATA11 XM 0DATA12 XM 0DATA13 XM 0DATA14 XM 0DATA15 XM0OEN/NIORD_CF XM 0WEN/NIOWR_CF XM 0ADV/GPP0 XM 0SM CLK/GP P1 X M 0 C S N 0 X M 0 C S N 1 X M 0 C S N 2 / G P O 0 X M 0 C S N 3 / G P O 1 X M 0 C S N 4 / G P O 2 X M 0 C S N 5 / G P O 3 X M 0 C S N 6 / G P O 4 X M 0 C S N 7 / G P O 5 X M 0 W A I T N / I O R D Y / G P P 2 X M 0 R D Y 0 / A L E / G P P 3 X M 0 R D Y 1 / C L E / G P P 4 X M 0 I N T S M 0 / F W E N / G P P 5 X M 0 I N T S M 1 / F R E N / G P P 6 X M 0 R P N / R N B / G P P 7 X M 0 I N T A T A / G P P 8 X M 0 R S T A T A / G P P 9 X M 0 I N P A C K A T A / G P P 1 0 X M 0 R E G A T A / G P P 1 1 X M 0 W E A T A / G P P 1 2 X M 0 O E A T A / G P P 1 3 X M 0 C D A T A / G P P 1 4 X M 0 D Q M 0 / B E 0 X M 0 D Q M 1 / B E 1 X M 0 R A S / G P Q 0 X M 0 C A S / G P Q 1 X M 0 S C L K / G P Q 2 X M 0 S C L K N / G P Q 3 X M 0 C K E / G P Q 4 X M 0 D Q S 0 / G P Q 5 X M 0 D Q S 1 / G P Q 6 X M 0 W E N D M C / G P Q 7 X M 0 A P D M C / G P Q 8 XM 1CKE0 XM 1CKE1 XM1SCLK XM 1SCLK N XM 1RASN XM 1CASN XM 1WEN XM1DQM0 XM1DQM1 XM1DQM2 XM1DQM3 XM1DQS0 XM1DQS1 XM1DQS2 XM1DQS3 XM 1CSN0 XM 1CSN1 XM1ADDR0 XM1ADDR1 XM1ADDR2 XM1ADDR3 XM1ADDR4 XM1ADDR5 XM1ADDR6 XM1ADDR7 XM1ADDR8 XM1ADDR9 XM1ADDR10 XM1ADDR11 XM1ADDR12 XM1ADDR13 XM1ADDR14 XM1ADDR15 X M 1 D A T A 3 0 X M 1 D A T A 2 9 X M 1 D A T A 2 8 X M 1 D A T A 2 7 X M 1 D A T A 2 6 / X M 0 A D D R 2 6 X M 1 D A T A 2 5 / X M 0 A D D R 2 5 X M 1 D A T A 2 4 / X M 0 A D D R 2 4 X M 1 D A T A 2 3 / X M 0 A D D R 2 3 X M 1 D A T A 2 2 / X M 0 A D D R 2 2 X M 1 D A T A 2 1 / X M 0 A D D R 2 1 X M 1 D A T A 2 0 / X M 0 A D D R 2 0 X M 1 D A T A 1 9 / X M 0 A D D R 1 9 X M 1 D A T A 1 8 / X M 0 A D D R 1 8 X M 1 D A T A 1 7 / X M 0 A D D R 1 7 X M 1 D A T A 1 6 / X M 0 A D D R 1 6 X M 1 D A T A 1 5 X M 1 D A T A 1 4 X M 1 D A T A 1 3 X M 1 D A T A 1 2 X M 1 D A T A 1 1 X M 1 D A T A 1 0 X M 1 D A T A 9 X M 1 D A T A 8 X M 1 D A T A 7 X M 1 D A T A 6 X M 1 D A T A 5 X M 1 D A T A 3 1 X M 1 D A T A 4 X M 1 D A T A 3 X M 1 D A T A 2 X M 1 D A T A 1 X M 1 D A T A 0 XURXD0/GPA0 XUTX D0/GPA 1 XUCTSN0/GPA2/A DDR_CF0 XURTSN0/GPA3/A DDR_CF1 XURXD1/GPA4 XUTX D1/GPA 5 XUCTSN1/GPA6/A DDR_CF0 XURTSN1/GPA7/A DDR_CF1 XURXD2/EX DREQ/IRRXD/GP B0/ADDR_CF0 XUTX D2/E XDA CK/IRTXD/GP B1/ADDR_CF1 XURX D3/IRRXD/EXDREQ/I2CSCL1GPB2/ADDR_CF2 XUTX D3/IRTX D/EXDACK/I2CS DA1/GP B3 XIRS DBW/BUF_DIR/GPB 4 XI2CSCL/GPB5 XI2CSDA/GP B6 XSP IM ISO0/ADDR_CF0/GPC0 XSP ICLK 0/ADDR_CF1/GP C1 XSP IM OSI0/ADDR_CF2/GPC2 XSP ICS0/GPC3 XSP IM IS O1/MMCCM D2/GPC4 XSP ICLK 1/MM CCLK2/GPC5 XSP IM OS I1/GP C6 XSP ICS1/GPC7 XUSBDP XUSBDN XOTGDP XOTGDM XOTGTI XOTGTO XREXT XVB US XOTGID XOTGDRV _VB US X M M C C L K 0 / A D D R _ C F 0 / G P G 0 X M M C C M D 0 / A D D R _ C F 1 / G P G 1 X M M C D A T A 0 _ 0 / A D D R _ C F 2 / G P G 2 X M M C D A T A 0 _ 1 / G P G 3 X M M C D A T A 0 _ 2 / G P G 4 X M M C D A T A 0 _ 3 / G P G 5 X M M C C D N 0 / M M C C D N 1 / G P G 6 X M M C C L K 1 / K P C O L 0 / A D D R _ C F 0 / G P H 0 X M M C C M D 1 / K P C O L 1 / A D D R _ C F 1 / G P H 1 X M M C D A T A 1 _ 0 / K P C O L 2 / A D D R _ C F 2 / G P H 2 X M M C D A T A 1 _ 1 / K P C O L 3 / G P H 3 X M M C D A T A 1 _ 2 / K P C O L 4 / G P H 4 X M M C D A T A 1 _ 3 / K P C O L 5 / G P H 5 X M C D A T A 1 _ 4 / M C D A T A 2 _ 0 / K P C O L 6 / A D R _ C F 0 / G P H 6 X M C D A T A 1 _ 5 / M C D A T A 2 _ 1 / K P C O L 7 / A D R _ C F 1 / G P H 7 X M M C D A T A 1 _ 6 / M M C D A T A 2 _ 2 / A D D R _ C F 2 / G P H 8 X M M C D A T A 1 _ 7 / M M C D A T A 2 _ 3 / G P H 9 X P C M D C L K 0 / I 2 S C L K / B I T C L K / A D D R _ C F 0 / G P D 0 X P C M E X T C L K 0 / I 2 S C D C L K / R E S N / A D R _ C F 1 / G P D 1 X P C M F S Y N C 0 / I 2 S L R C K / S Y N C / A D D R _ C F 2 / G P D 2 X P C M S I N 0 / I 2 S D I / S D I / G P D 3 X P C M S O U T 0 / I 2 S D O / S D O / G P D 4 X P C M D C L K 1 / I 2 S C L K / B I T C L K / G P E 0 X P C M E X T C L K 1 / I 2 S C D C L K / R E S E T N / G P E 1 X P C M F S Y N C 1 / I 2 S L R C K / S Y N C / G P E 2 X P C M S I N 1 / I 2 S D I / S D I / G P E 3 X P C M S O U T 1 / I 2 S D O / S D O / G P E 4 XEINT15/GPN15 XEINT14/GPN14 XEINT13/GPN13 XEINT12/GPN12 XEINT11/GPN11 XEINT10/ADDR_CF2/GPN10 XEINT9/ADDR_CF1/GPN9 XEINT8/ADDR_CF0/GPN8 XEINT7/KPROW7/GPN7 XEINT6/KPROW6/GPN6 XEINT5/KPROW5/GPN5 XEINT4/KPROW4/GPN4 XEINT3/KPROW3/GPN3 XEINT2/KPROW2/GPN2 XEINT1/KPROW1/GPN1 XEINT0/KPROW0/GPN0 XPWM ECLK/GPF13 XPWM TOUT0/XCLKOUT/GP F14 XPWM TOUT1/GPF15 XRTCXTI XRTCXTO X27MX TI X27MX TO XXTI XXTO XEX TCLK X T R S T N X T M S X T C K X T D I X T D O X R T C K X D B G S E L X O M 0 X O M 1 X O M 2 X O M 3 X O M 4 X P W R R G T O N X N B A T F X S E L N A N D X E F F V D D X N R E S E T X W R E S E T X N R S T O U T XCICLK /GP F0 XCIHRE F/GPF1 XCIP CLK/GP F2 XCIRSTN/GPF3 XCIV SYNC/GPF4 XCIY DATA0/GP F5 XCIY DATA1/GP F6 XCIY DATA2/GP F7 XCIY DATA3/GP F8 XCIY DATA4/GP F9 XCIY DATA5/GP F10 XCIY DATA6/GP F11 XCIY DATA7/GP F12 XDACOUT_0 XDACOUT_1 XDACIREF XDACV REF XDACCOMP XADC_AIN0 XADC_AIN1 XADC_AIN2 XADC_AIN3 XADC_AIN4 XADC_AIN5 XADC_AIN6 XADC_AIN7 XPLLE FLITE R X V V D 0 / G P I 0 X V V D 1 / G P I 1 X V V D 2 / G P I 2 X V V D 3 / G P I 3 X V V D 4 / G P I 4 X V V D 5 / G P I 5 X V V D 6 / G P I 6 X V V D 7 / G P I 7 X V V D 8 / G P I 8 X V V D 9 / G P I 9 X V V D 1 0 / G P I 1 0 X V V D 1 1 / G P I 1 1 X V V D 1 2 / G P I 1 2 X V V D 1 3 / G P I 1 3 X V V D 1 4 / G P I 1 4 X V V D 1 5 / G P I 1 5 X V V D 1 6 / G P J 0 X V V D 1 7 / G P J 1 X V V D 1 8 / G P J 2 X V V D 1 9 / G P J 3 X V V D 2 0 / G P J 4 X V V D 2 1 / G P J 5 X V V D 2 2 / G P J 6 X V V D 2 3 / G P J 7 X V H S Y N C / G P J 8 X V V S Y N C / G P J 9 X V V D E N / G P J 1 0 X V V C L K / G P J 1 1 XHIDATA3/RXDATA/CF_DATA3/GPK 3 XHIDATA4/TXREADY/CF_DATA4/GP K4 XHIDATA5/TXWAK E/CF_DATA5/GPK 5 XHIDATA6/TXFLAG/CF_DATA6/GPK6 XHIDATA7/TXDATA/CF_DATA7/GP K7 XHIDATA8/K PROW0/CF_DA TA 8/GPK8 XHIDATA9/K PROW1/CF_DA TA 9/GPK9 XHIDATA10/KPROW2/CF_DATA10/GPK10 XHIDATA11/KPROW3/CF_DATA11/GPK11 XHIDATA12/KPROW4/CF_DATA12/GPK12 XHIDATA13/KPROW5/CF_DATA13/GPK13 XHIDATA14/KPROW6/CF_DATA14/GPK14 XHIDATA15/KPROW7/CF_DATA15/GPK15 XHIDATA16/EINT21/GPL13 XHIDATA17/EINT22/GPL14 XHICSNMAIN/CE_CF1/EINT24/GPM1 XHICSN/CE_CF0/EINT23/GPM0 XHICSN_S UB/CF_IORD/EINT25/GPM2 XHIWE N/CF_IOWR/EINT26/GPM3 XHIOEN/CF_IORDY/EINT27/GPM4 XHIINTR/BUF_DIR/GPM5 X H I A D D R 1 2 / E I N T 2 0 / G P L 1 2 X H I A D D R 1 1 / E I N T 1 9 / G P L 1 1 X H I A D D R 1 0 / E I N T 1 8 / G P L 1 0 X H I A D D R 9 / E I N T 1 7 / G P L 9 X H I A D D R 8 / E I N T 1 6 / G P L 8 X H I A D D R 7 / K P C O L 7 / G P L 7 X H I A D D R 6 / K P C O L 6 / G P L 6 X H I A D D R 5 / K P C O L 5 / G P L 5 X H I A D D R 4 / K P C O L 4 / G P L 4 X H I A D D R 3 / K P C O L 3 / G P L 3 X H I A D D R 2 / K P C O L 2 / C F _ A D D R 2 / G P L 2 X H I A D D R 1 / K P C O L 1 / C F _ A D D R 1 / G P L 1 X H I A D D R 0 / K P C O L 0 / C F _ A D D R 0 / G P L 0 XHIDATA2/RXFLA G/CF_DA TA 2/GPK2 XHIDATA1/RXWAKE /CF_DATA1/GPK1 XHIDATA0/RXREADY/CF_DATA0/GPK 0 VDD_ARM 0 VDD_ARM 1 VDD_ARM 2 VDD_ARM 3 VDD_ARM 4 VDD_ARM 5 VDD_ARM 6 VDD_ARM 7 VDD_ARM 8 VDD_ARM 9 VDD_INT0 VDD_INT1 VDD_INT2 VDD_INT3 VDD_INT4 VDD_INT5 VDD_INT6 VDD_INT7 VDD_INT8 VDD_INT9 VDD_INT10 VDD_ALIVE 0 VDD_ALIVE 1 VDD_ALIVE 2 VDD_APLL VDD_EPLL VDD_MPLL V D D _ R T C V D D _ M E M 0 _ 0 V D D _ M E M 0 _ 1 V D D _ M E M 0 _ 2 V D D _ M E M 0 _ 3 V D D _ M E M 0 _ 4 V D D _ M E M 1 _ 0 V D D _ M E M 1 _ 1 V D D _ M E M 1 _ 2 V D D _ M E M 1 _ 3 V D D _ M E M 1 _ 4 V D D _ S Y S 0 V D D _ L C D 0 V D D _ L C D 1 V D D _ M M C V D D _ P C M V D D _ H I 0 V D D _ H I 1 V D D _ E X T V D D _ U H V D D _ O T G 0 V D D _ O T G 1 V D D _ O T G I V D D _ A D C V D D _ D A C VSS _IP0 VSS _IP1 VSS _IP2 VSS _IP3 VSS _IP4 VSS _IP5 VSS _IP6 VSS _IP7 VSS _A PLL VSS _E PLL VSS _M PLL VSS _ME M0 VSS _ME M1 VSS _ME M2 VSS _ME M3 VSS _ME M4 VSS _ME M5 VSS _P ERI0 VSS _P ERI1 VSS _P ERI2 VSS _P ERI3 VSS _P ERI4 VSS _P ERI5 VSS _P ERI6 VSS _P ERI7 VSS _A DC VSS _DAC VSS _OTG0 VSS _OTG1 VSS _OTGI N C 0 N C 1 N C 2 N C 3 N C 4 N C 5 N C 6 N C 7 VDD_ARM 10 VDD_ARM 11 VDD_ARM 12 VDD_ARM 13 N C 8 N C 9 N C 1 0 N C 1 1 VSS _P ERI8 VSS _ME M6 VSS _ME M7 VSS _ME M8 VSS _ME M9 VSS _ME M10 VSS _IP9 VSS _IP10 VSS _IP11 VSS _IP12 VSS _IP13 VSS _IP14 VSS _IP15 VSS _IP16 VSS _IP17 VSS _IP18 VSS _IP19 VSS _IP20 VSS _IP21 VSS _IP22 VSS _IP23 POP_VDDQ0 POP_VDDQ1 POP_VDDQ2 POP_VDDQ3 POP_VDDQ4 POP_VDDQ5 POP_VDDQ6 POP_VDDQ7 POP_VDDQ8 POP_VDD0 POP_VDD1 POP_VDD2 POP_VDD3 POP_VDD4 POP_VDD5 POP_VDD6 POP_NCE1M M POP_NCE0M M POP_VCCQ POP_VCCQ0 P O P _ V S S Q 0 P O P _ V S S Q 1 P O P _ V S S Q 2 P O P _ V S S Q 3 P O P _ V S S Q 4 P O P _ V S S Q 5 P O P _ V S S Q 6 P O P _ V S S Q 8 P O P _ V S S Q 7 P O P _ V S S D 0 P O P _ V S S D 1 P O P _ V S S D 2 P O P _ V S S D 3 P O P _ V S S D 4 P O P _ V S S D 5 P O P _ V S S D 6 P O P _ V S S M M 0 P O P _ V S S M M 1 P O P _ V S S M M 2 POP_VCCMM 0 POP_VCCMM 1 P O P _ V S S M M 3 C125 15P C126 15P C120 0.1U C124 0.1U C101 0.1U C102 0.1U C103 0.1U C105 0.1U C106 0.1U C107 0.1U C 1 1 1 1 5 P C 1 1 2 1 5 P C113 15P T 1 0 7 T 1 0 8 T 1 0 9 T 1 1 0 T 1 1 1 T113 TP C116 0.1U C117 0.1U C118 0.1U T 1 1 2 C110 1.8N Y 1 0 2 3 2 . 7 6 8 K 1 T12 F I D U C T I O N M A R K 1 T13 F I D U C T I O N M A R K 1 T14 F I D U C T I O N M A R K 1 T15 F I D U C T I O N M A R K C133 0.1U C134 0.1U C132 0.1U C108 0.1UC109 0.1U C141 0.1U C140 0.1U C145 0.1U C144 0.1U C123 0.1U R117 200K 1% R116 200K 1% R115 6.24K 1% R112 4K7_5% R113 4K7_ 5% R123 44.2ohm1% C114 15P C 1 3 6 1 5 P 3 1 2 4 Y101 48M 3 1 2 4 Y103 12M Y104 27M C138 0.1U R125 100k5% R127 100k5% C150 0.1U C151 0.1U C152 0.1U C139 0.1U R132 100k5% G7 F3 H7 G2 J7 E2 J6 H6 K6 G1 L6 E1 K7 J3 F2 J1 R3 P1 P3 N3 U1 T1 T2 AD2 M4 M3 M1 N2 N4 L4 L2 L3 K4 M10 W3 L7 N 6 N 7 U 6 M 6 M 7 U 4 P 6 P 4 R 4 R 1 T 4 Y 1 V 6 Y 3 T 1 0 V 7 W 2 U 7 W 7 W 4 W 6 N 1 K 3 R 7 T 3 T 6 R 6 T 7 U 2 R 2 P 7 H 4 T26 U25 D12 D13 V26 T25 W24 C6 B11 A15 H23 B8 A9 D15 F25 M17 K23 K26 M26 L26 L25 M24 R25 N26 N25 J24 M25 L24 P26 P25 R26 N24 P24 K 2 5 H 2 6 G 2 5 J 2 5 F 2 6 H 2 4 G 2 4 J 2 3 C 1 4 B 1 9 A 1 8 A 1 4 A 1 2 B 1 3 A 1 3 B 1 0 B 1 2 A 6 C 1 5 A 1 1 D 1 4 C 1 1 A 1 0 D 1 1 C 1 0 C 9 G 2 6 B 9 D 1 0 A 7 C 7 C 8 U101-A s3c6410_x51 H20 A21 B21 A24 A20 F20 C21 G18 B20 G19 F19 G20 G21 F18 J21 D19 B18 C19 A17 D18 B16 C20 B17 M20 N20 AF12 AF11 AC10 AC11 AD10 AE10 AC12 AE12 G 1 7 D 1 7 G 1 3 C 1 7 G 1 2 C 1 8 F 1 7 D 1 6 C 1 6 G 1 4 A 1 6 F 1 3 C 1 3 G 1 5 F 1 6 F 1 4 F 1 5 F 8 B 6 D 2 D 3 A 5 C 5 B 4 D 1 B 2 B 3 U17 AD19 AA15 AC19 M15 AA18 U14 AC18 Y16 AE19 T12 AF16 R12 AD17 Y12 AD16 C22 H21 B23 AA13 AA12 AA16 AA17 AC16 AC17 Y14 A D 1 3 T 1 1 A A 1 4 A D 1 2 T 1 4 R 1 3 U 1 1 U 1 2 A D 1 4 U 1 3 A E 1 5 N 1 2 A E 1 8 A D 1 5 Y 1 3 V 4 R 1 4 A C 1 5 A E 1 6 U101-B s3c6410_x51 F24 E26 D25 E24 D26 C26 C24 C23 D24 A23 B24 B22 A22 AD8 AA9 Y9 AC8 AA10 AC2 AD5 A