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protel 快捷键(Protel 快捷键)

2017-10-24 25页 doc 78KB 36阅读

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protel 快捷键(Protel 快捷键)protel 快捷键(Protel 快捷键) protel 快捷键(Protel 快捷键) Protel keyboard shortcuts A pops up the edit\align submenu B pops up the view\toolbars submenu E pops up the edit menu F pops up the file menu H pops up the help menu J pops up the edit\jump menu L pops up the e...
protel 快捷键(Protel 快捷键)
protel 快捷键(Protel 快捷键) protel 快捷键(Protel 快捷键) Protel keyboard shortcuts A pops up the edit\align submenu B pops up the view\toolbars submenu E pops up the edit menu F pops up the file menu H pops up the help menu J pops up the edit\jump menu L pops up the edit\set location makers submenu M pops up the edit\move submenu O pops up the options menu P pops up the place menu Q mm (mm) and mil (mill) unit switching R pops up the reports menu S pops up the edit\select submenu T pops up the tools menu V pops up the View menu W pops up the window menu E pops up the edit\deselect menu Z pops up the zoom menu X flips the floating map horizontally (left and right) Y flips the floating map vertically (up and down) Im measures the distance between two points OO sets the color of each layer (Layer) of the PCB Oy displays the coordinate origin (Option-Preferences-Display) and selects the hook before the "Origin Marker". OP changes the angle of rotation: "O" - "P" (Option-Option), and in "Rotation Step", enter a new angle of rotation. Ol open / close layer: "O" - "L" (Option-Layer), select or cancel the corresponding layer. PT painted copper clad wire (Place, Track). SP select the shortcut key "S" - "P" (Select-Connected Cooper), select the copper foil to connect. TJ makes the envelope contour of the selected object, and the envelope spacing is set in "D" - "R" (Design Rules-Routing-Clearance Constraint). Xa cancels all selections (Unselect, All). VF displays the entire PCB board surface. F1 starts the online help window F3 looks for the next matching character E x edits X, and X is the edit target. The code name is as follows: (A) = arc (C) = element (F) = fill (P) = pad (N) = Network (S) = character (T) = wire (V) = through hole (I) = connecting line (G) = fill polygon For example, when editing components, press E C, the mouse pointer appears "ten", and then click the component you want to edit to edit. P x puts X, X is the target, the code name is ibid. M, x, mobile, X, X for mobile targets, (A), (C), (F), (P), (S), (T), (V), (), (G), ibid., in addition (I) = flip select section; (O) rotating selection section (M) = move select part (R) = rewiring. S x selects X, X for the selection of content, code is as follows: (I) = internal region; (O) = external region; (A) = all; (L) = all on the floor (K) = locking part (N) = physical network (C) = physical connection line; (H) = a pad with a specified aperture; (G) = pads outside the grid For example, when you want to select all, press S A, and all the graphics shining indicate that you have been selected. You can copy, clear, move, etc the selected files. ESC abandon or cancel ESC terminates the currently active operation and returns the standby state Tab starts the properties window for floating maps End refresh screen Del delete point element (1) X+a cancels the selection of all selected maps V+d zoom view to show the whole circuit diagram V+f zoom view to show all circuit components Select S+A E+D delete TM removes green SP highlight Shift+s display single layer PgUp uses mouse as center to enlarge window display proportion PgDn takes the mouse as the center to reduce the window display proportion Home refreshes the screen with the cursor position centered Enter selects or starts Space floating maps rotate 90 degrees When delete places a wire or polygon, the last vertex is deleted Spacebar changes wiring mode when drawing a wire, line, or bus When backspace places a wire or polygon, the last vertex is deleted The left arrow cursor shifts 1 electrical grids to the left The right arrow cursor moves right to the 1 electrical grid Move up the 1 electrical grids on the top arrow Lower the arrow cursor and move down the 1 electrical grids Shift+ the left arrow cursor shifts 10 electrical grids to the left Shift+ the right arrow cursor moves right to the 10 electrical grid Move the 10 electrical grids up on the arrow cursor on the shift+ Shift+ down the arrow cursor, move down the 10 electrical grids Ctrl+1 displays drawings in the size of the original part Ctrl+2 displays drawings with 200% of the original size of the part Ctrl+4 displays drawings with 400% of the original size of the part Ctrl+5 displays drawings with 50% of the original size of the part Ctrl+f find the specified character Ctrl+g search and replace character Ctrl+b aligns the following edges of the selected object as baseline and bottom aligned Ctrl+t selects the top edge of the selected object as the baseline, top aligned Ctrl+l will be selected to the left edge of base alignment Ctrl+r will be selected by the right edge as a benchmark, right aligned Ctrl+h takes the selected object as the baseline for the center line of the left and right edges, Horizontally centered Ctrl+v takes the center line of the lower edge of the selected object as the baseline and vertically centered Alt+f4 closes Protel Alt+tab switches between individual applications that are opened Ctrl+del removes selected components (2 or more than 2) Crtl+ins copies the selected maps into the editing area Ctrl+tab switches between open design documents and documents Shift+ins Posts maps from the clipboard to the editing area Shift+del will select the map cut into the clipboard Alt+backspace restores the previous operation Ctrl+backspace cancels the previous recovery Shift+f4 displays all of the document windows open Shift+f5 displays all the document windows that will be opened Shift+ single left mouse can select one or more objects. Crtl+ single left mouse releases crtl to drag a single object Ctrl+shift+h sets the selected object horizontally between the left and right edges Ctrl+shift+v evenly sets the selected object vertically between the upper and lower edges Shift+ctrl+ left mouse moves a single object Ctrl+Insert (Ctrl+C) copies selected objects. Shift+Insert (Ctrl+V) paste. Ctrl+Del deletes selected objects. Shift+ space, in the process of drawing the copper foil line, switch in the following lines: straight line, 45 degree diagonal line, arc line, any angle line When you move or drag the object by pressing Ctrl, it is not limited by the grid of the appliance Press ALT to move or drag the moving object, and keep it vertical Press shift+alt to move or drag the moving object, and keep it horizontal Hold the right mouse button, the mouse becomes hand shape, you can achieve PCB translation, a bit like AutoCAD. Small numeric keypad area: * switching between layers of printed boards Toggle all layers in sequence - reverse handover between yo yo layers Ctrl+del - removes selected components (2 or more than 2) X+a - cancels the selection of all selected maps The wiring principle of Protel se In the PCB design, wiring is an important step of product design, it can be said in front of the preparatory work is done for it, in the whole PCB, wiring design process maximum limit, the maximum workload, fine skills. PCB wiring has one side wiring, double sided wiring and multilayer wiring. There are two kinds of methods: automatic wiring wiring and interactive wiring, in the automatic wiring before, to more stringent requirements for interactive pre wiring line, input and output lines should be avoided so as to avoid the interference of adjacent parallel. If necessary, the ground wire shall be isolated, and the wiring of the two adjacent layers shall be perpendicular to each other and parallel to each other, so that parasitic coupling is easy to occur. Automatic routing rate, depends on good layout, wiring rules can be set in advance, including the number of bends, wire guide hole number, step number etc.. Generally, an exploratory fabric warp is used to rapidly connect the short lines, Then, the maze routing, first to the cloth line for global routing optimization, it can be disconnected according to the needs of the cloth line. And try rewiring to improve the overall effect. The PCB design of high density has been felt through holes do not adapt, it wasted a lot of valuable routing channel, in order to solve this problem, the blind and buried hole technology, it not only completed the conduction hole, but also many province wiring channel makes the wiring process more convenient. More smooth, more perfect, the design process of PCB plate is a complex and simple process, want to have a good grasp of it, also need a large number of electronic engineering design personnel to their own experience, in order to get the true meaning. 1, power, ground handling Even though the wiring in the whole PCB board is well done, the interference caused by the power and ground wire is not considerate, and the performance of the product will be reduced, and sometimes even the product's success rate will be affected. Therefore, the wiring of the power and ground should be treated seriously, and the noise interference caused by the electric wire and ground wire will be reduced to the minimum to ensure the quality of the products. For all engineers engaged in the design of electronic products, the reasons for the noise between the ground wire and the power line are understood. Only the noise suppression is reduced: It is well known that a coupling capacitor is added between the power source and the ground wire. Try to widen the power and ground wire width, is better than the power supply line, the relationship between them is: ground, power line, signal line, usually signal line width: 0.2 ~ 0.3mm, the fine width can reach 0.05 ~ 0.07mm, 1.2 ~ 2.5 mm power line, the digital circuit of PCB available wide to wire form a loop, which constitute a network to use (analog circuit to cant use) A large area of copper is used as earth wire, and the places on the printed board which are not used are connected with the ground as the ground wire. Or made of multilayer board, power, ground wire each occupy a layer. 2 、 digital circuit and Analog Circuit CO processing Many PCB is no longer a single function circuit (digital or analog circuit), but is made up of digital circuits and analog circuits. Therefore, in wiring, it is necessary to consider the interference between them, especially the noise interference on the ground. The high frequency digital circuit, analog circuit is more sensitive to the signal lines, signal lines, high-frequency circuit device simulation as far as sensitive, to the ground, the entire PCB to the outside world only one node, so we must address the problem of total number, die within PCB, but in the internal digital and analog ground are actually separate them between each other, only in the PCB to connect with the outside interface (such as plug etc.). Please note that there is only one connection point. There are also PCB on the ground, which is determined by system design. 3 、 the signal line is distributed on the electric (ground) layer In the multilayer wiring printed board, the signal line layer does not end the remaining cloth line is not much, more layers will be wasted will increase some work for the production cost also increases accordingly, in order to solve this contradiction, can be considered in the electrical wiring layer (ground). First, the power layer should be considered, followed by the formation. Because it is better to preserve the integrity of the formation. 4. Handling of connecting leg in large area conductor On the ground of large area (electric), common components of the legs are connected, to connect legs need comprehensive consideration, electrical properties, and the copper pad surface element leg full connected as well, but for the assembly of welded elements there are some bad risks such as: welding needs large power heater. It is easy to cause the weld point. So both the electrical properties and process requirements, made of cruciferous pads, called heat isolation (heat shield) commonly known as thermal pad (Thermal), it can make the possibility of resulting weld point due to excessive heat in the welding section is greatly reduced. The multilayer panel has the same electrical (ground) layer legs. 5 、 the role of network system in wiring In many CAD systems, routing is determined by the network system. The grid is too dense, although the pathway has increased, but the step is too small, the amount of data field is too large, which is bound to the equipment storage space have higher requirements, but also have a great impact on the object computer electronics operation speed. Some of the channels are ineffective, such as those that are occupied by the pads on the leg of the components, or are installed, holes, holes, etc.. The grid is too sparse, too little pathway has a great influence on the efficiency of the. Therefore, a grid system with reasonable density is needed to support the routing. The distance between the legs of a standard component is 0.1 inches (2.54mm), so the base of the grid system is usually 0.1 inches (2.54 mm) or less than 0.1 inches, such as 0.05 inches, 0.025 inches, 0.02 inches, etc.. 6, design rules check (DRC) The wiring design is completed, need to carefully check the wiring design meets the set designer rules also need to confirm compliance with the rules in the production process of printed demand, general examination are as follows: Wires and wires, wires and components, pads, wires and through holes, components, pads and through holes, through holes and through holes are reasonable, whether or not to meet production requirements. Is the width of the power line and ground wire appropriate, and is the coupling (low impedance) between the power and ground? Is there any place in the PCB that can widen the earth's ground?. For the key signal line, the best input, such as the shortest length, plus the protective line, the input line and the output line are clearly separated. Do analog circuits and digital circuits have separate ground lines?. Does the pattern (such as icons or labels) added to the PCB cause a signal to be shorted?. Modify some undesirable alignment. Is there a process line on the PCB? Does the solder resist conform to the requirements of the manufacturing process and is the size of the solder joint appropriate and whether the character mark is pressed on the pad of the device so as to avoid affecting the quality of the Denso?. The outer edge of the power layer in the multilayer plate is reduced, such as the copper foil of the power stratum is exposed outside the plate, and the short circuit is easy to be caused. 2, the design flow of PCB is divided into six steps: netlist input, rule setting, component layout, wiring, check, review and output 2.1 netlist input There are two ways to input netlist, One is to use the OLE PowerPCB Connection function of PowerLogic, select Send Netlist, and apply the OLE function, which can be guaranteed at any time Stick to the consistency of the schematic and the PCB diagram to minimize the possibility of error. Another approach is to load the netlist directly in PowerPCB, select File->Import, and enter the netlist generated by the schematic. 2.2 rules setting, if in the schematic design stage has already set PCB design rules, then no need to set up These rules, because when you enter the netlist, the design rules have been entered into the PowerPCB with the netlist. If you modify the design rules, you must synchronize schematics to ensure schematics and PCB Agreement. In addition to the design rules and layer definitions, there are some rules that need to be set, such as Pad Stacks, which need to modify the size of the standard vias. If the designer creates a new one Pads or vias must be added with Layer 25. Note: the PCB design rules, layer definitions, through-hole settings, and CAM output settings have been made default start files. The name is Default.stp, and after the netlist is entered, follow Design the actual situation, the power network and ground distribution to the power layer and formation, and set up other advanced rules. After all the rules are set up, in PowerLogic, Using the Rules From Connection feature of the OLE PowerPCB PCB, update the rule settings in the schematic to ensure that the original Schematic and PCB map consistent rules. 2.3 components layout netlist input, all components will be placed in the work area of zero, overlap, and the next step is to separate these components, in accordance with Some rules are arranged neatly, that is, the layout of the components. PowerPCB provides two methods, manual layout and automatic layout. 2.3.1 manual layout 1. tool printed board structure size, draw plate edge (Board Outline). 2. Disperse Components components, components will be arranged around the edge of the plate. 3. move the components one by one, and place them inside the edge of the board, and put them in order according to certain rules. 2.3.2 automatic layout PowerPCB provides automatic layout and automatic local cluster layout, but for most designs, the effect is not ideal and is not recommended. 2.3.3 notes The first principle is to ensure that the layout of the A. routing rate, mobile devices that connected with a fly line, the device has connections together B. digital devices and analog devices should be separated, as far as possible from the C. decoupling capacitor, as close as possible to the device VCC D. devices should be considered for future welding, not too dense E. uses the Array and Union features provided by the software to improve the efficiency of the layout 2.4 wiring wiring also has two kinds, manual wiring and automatic wiring. The manual routing capabilities offered by PowerPCB are powerful, including automatic push and online design rule checking (DRC), automated routing by the wiring engine of Specctra, usually These two methods are used in conjunction with manual, automatic and manual steps. 2.4.1 manual wiring 1. before automatic routing, first use manual cloth to some important network, Such as high-frequency clock, the main power supply, etc., these networks are often on the line distance, Xian Kuan, line spacing, shielding and other special The requirements; some special packages, such as BGA, automatic wiring difficult cloth has rules, but also with the manual wiring. 2. after the automatic wiring, but also with manual wiring to adjust the line of PCB. 2.4.2 automatic wiring, manual wiring after the end of the remaining The network is handed to the router, from the cloth. Select Tools->SPECCTRA, start the Specctra wiring interface, set up the DO file, press Continue to start the Specctra Automatic routing router, if after the completion rate is 100%, then you can manually adjust the wiring; if less than 100%, indicating the layout or manual wiring problems, need to Adjust the layout or manual wiring, until all the completion date. 2.4.3 notes A. power cord and ground wire as bold as possible The B. decoupling capacitor is directly connected to the VCC When C. sets the DO file for Specctra, first, add the Protect all wires command to protect the line of hand cloth from being automatically wired D. if there is a hybrid power layer, the layer should be defined as Split/mixed Plane, separated before routing, and after the line ends, use the Pour Manager Plane Connect was used for copper cladding E. sets all of the device pins to hot pads. The method is to set the Filter to Pins, check all the pins, modify the properties, and tick before the Thermal option F. manual routing, open the DRC option, using dynamic routing (Dynamic Route) 2.5 check the items for spacing (Clearance), connectivity (Connectivity), high-speed rules (High, Speed) and power layer (Plane), these items You can choose Tools->Verify Design to proceed. If set You must check if you have a high speed rule, otherwise you can skip this item. To check for errors, you must modify the layout and wiring. Note: some errors can be ignored, such as some answers A part of the Outline of the plug-in is placed outside the plate and frame, and errors are detected when checking the spacing. 2.6 review and review, according to "PCB check list", including design rules, layer definition, Xian Kuan, spacing, pad, through the hole settings, but also focus on reviewing the rational layout of devices The wiring of the power and ground network, the routing and shielding of the high-speed clock network, the placement and connection of decoupling capacitors, etc.. If the review fails, the designer shall modify the layout and wiring After the case, the supervisor and the designer sign the signature separately. 2.7 design output PCB design can be output to printer or output light drawing file. The printer can print PCB hierarchically so that it can be checked by the designer and the supervisor Manufacturer of boards, producing printed boards. The output of the output file is very important and related to the success of the design. The following will focus on the output of the drawn file Matter。 A. needs to output the layer has wiring layer (including the top layer, the bottom layer, the middle wiring layer), the power layer (including VCC and GND layer), silk screen layer (including top screen printing, bottom screen printing) The solder mask (including the top and bottom solder solder), in addition to generate the file (NC Drill B.) if the power supply layer is set to Split/Mixed, then the Add Document Document window select Routing, and each output Gerber files before, to use the Pour Manager Plane Connect PCB map for review copper; If set to CAM Plane, select Plane, when you set the Layer item, add the Layer25, and select the Pads and Viasc. in the Layer25 layer in the device settings window (press Device Setup) to change the value of Aperture to 199 D., and select Board Outline when setting the Layer of each layer E. set screen printing layer of Layer, do not choose Part Type, select the top (bottom) and screen layer of Outline, Text, Line When the f. sets up the Layer of the solder resist, the hole is selected to indicate that there is no welding resistance on the vias, and no holes are selected to indicate the resistance to welding, as determined by the specific conditions When g. generates a drill file, use the default settings of PowerPCB without making any changes After all the H. drawing files are output, the CAM350 is opened and printed, and the check holes (via) are examined by the designer and by the tester on the "PCB check list", which is an important group of the multilayer PCB In part, drilling costs typically account for 30% to 40% of PCB board costs. In brief, each hole on the PCB can be called vias. From the function point of view, the vias can be divided into two categories: first, as the electrical connection between the layers; The two is used as a fixed or positioning device. If from the process of processing, these vias are generally divided into three categories, namely blind hole (blind, via), via (buried) and through hole (through, via). The blind hole is located on the top and bottom surface of the printed circuit board and has a certain depth. It is used for the connection of the surface line and the inner line below. The depth of the hole is usually not More than a certain proportion (Kong Jing). A buried hole means a connecting hole in the inner layer of a printed circuit board, which does not extend to the surface of the circuit board. The two types of holes are located in the inner layer of the circuit board, Prior to laminating, the process is accomplished by through-hole forming and may overlap several layers during the formation of vias. The third is called a through hole, which passes through the entire circuit board and can be used in practice Mounting holes for internal interconnection or as components. Since vias are easier to implement and lower in cost, most printed circuit boards use it without the other two Drill through. The vias mentioned below, without special instructions, are considered as vias. From the design point of view, an over hole is made up of two main parts, one is the drill hole in the center (drill, hole) two is the pad area around the hole. See below. The size of these two sections determines the size of the vias. Obviously, in high speed, high density PCB design The meter always wants the smaller the hole, the better, so that the board can leave more wiring space, in addition, the smaller the hole, its own parasitic capacitance is smaller, more suitable for high-speed circuits. However, the reduction of hole size brings about an increase in cost, and the size of vias can not be reduced without limit, It is subjected to drilling (drill) and electroplating (plating) processes Limitations: the smaller the hole, the longer the borehole takes, and the more likely it is to deviate from the central location; and when the hole's depth is 6 times the diameter of the drill hole, it is impossible to ensure that the hole wall is uniformly plated with copper. For example, the thickness of a normal 6 piece PCB board (through hole depth) is about 50Mil, so the diameter of the drill hole provided by the PCB manufacturer is the smallest, and can only reach 8Mil. Two, through the hole sent The capacitance passes through the hole itself and has parasitic capacitance to the ground. If the hole is known to be on the floor, the diameter of the isolation hole is D2, the diameter of the through hole pad is D1, and the thickness of the PCB plate is T When the dielectric constant is epsilon, the parasitic capacitance of the vias is approximately the same as that of C=1.41 epsilon TD1/ (D2-D1), and the parasitic capacitance of the vias leads to a major increase in the signal rise Time reduces the speed of the circuit. For example, for a 50Mil plate thickness is PCB, if you use the 10Mil inner diameter, hole diameter of 20Mil pad, the pad and the floor The distance of the copper region is 32Mil, and we can approximate the parasitic capacitance of the vias by the formula above. The capacitance is approximately C=1.41x4.4x0.050x0.020/ (0.032-0.020) =0.517pF, The rise time of this part of capacitance varies from T10-90=2.2C (Z0/2) to =2.2x0.517x (55/2) =31.28ps. From these values, it can be seen that despite single parasitic vias The effect of capacitance on the rise delay is not obvious, but the designer should consider carefully if switching between layers is used many times in the route. Three, the parasitic inductance of vias also has parasitic inductance at the same time that the parasitic capacitance exists in the vias. In the design of high-speed digital circuits, the parasitic inductance of the vias is harmful Is often greater than parasitic capacitance. Its parasitic series inductance will weaken the contribution of bypass capacitor and weaken the filtering effectiveness of the whole power supply system. We can use the following formula to simplify The parasitic inductance of an over hole approximation is calculated in single way: L=5.08h[ln (4h/d) +1], in which the L refers to the inductance of the through hole, the H is the length of the through-hole, and the D is the diameter of the center bore. From the formula you can It is found that the diameter of through hole has little influence on inductance, but the length of through hole is the biggest influence on inductance. The above example is still used to calculate the inductance of the vias: L= 5.08x0.050[ln (4x0.050/0.010) +1]=1.015nH. If the signal rise time is 1ns, then the equivalent impedance is XL= PI L/T10-90=3.19 ohms. such The impedance in the high frequency current has been unable to be ignored, and it is particularly important to note that the bypass capacitor is required to pass through two vias through the power layer and the formation Parasitic inductance will increase exponentially. Four, high-speed PCB in the through-hole design, through the above analysis of the parasitic characteristics of the hole, we can see that in high-speed PCB design, seemingly simple vias are often given to the circuit The design has a lot of negative effects. In order to reduce the adverse effects of parasitic effects through vias, the design can be done as much as possible: 1, from the cost and signal quality of two considerations, select a reasonable size of the hole size. For example, for the 6-10 layer memory module, the PCB design uses the 10/20Mil (drill hole / pad) The through-hole is better, and for some small boards with high density, you can also use 8/18Mil vias. At present, it is difficult to use smaller size vias under technical conditions. Yes For power or ground vias, a larger size may be considered to minimize impedance. 2, the two formulas discussed above can be used to reduce the two parasitic parameters of vias by using thinner PCB plates. 3, PCB signal on the board as far as possible without changing the layer, that is to say, do not use unnecessary vias. 4, the power and ground pins to the nearest hole, the hole and the pin between the shorter the better, because they will lead to an increase in inductance. At the same time, power and ground lead should be as thick as possible, To reduce impedance. 5. Some ground vias are placed near the vias of the signal transfer layer to provide the closest loop for the signal. You can even place a number of redundant ground vias on the PCB board. When However, flexibility is needed in design. The cross hole model discussed above is a pad for each layer, and sometimes we can reduce or even remove some layers of pads. Especially in cases where the hole density is very large, it may result in the formation of a cut off slot in the copper clad layer. To solve this problem, we can also move the location of the through hole In order to reduce the size of the pad in the copper clad layer, the vias are taken into consideration.
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